From d1c3b27525b664e8c4db6bb173eed51bfc8220de Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 9 Sep 2009 16:25:29 +0200 Subject: ppc4xx: Big cleanup of PPC4xx defines This patch cleans up multiple issues of the 4xx register (mostly DCR, SDR, CPR, etc) definitions: - Change lower case defines to upper case (plb4_acr -> PLB4_ACR) - Change the defines to better match the names from the user's manuals (e.g. cprpllc -> CPR0_PLLC) - Removal of some unused defines Please test this patch intensive on your PPC4xx platform. Even though I tried not to break anything and tested successfully on multiple 4xx AMCC platforms, testing on custom platforms is recommended. Signed-off-by: Stefan Roese --- board/jse/init.S | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) (limited to 'board/jse/init.S') diff --git a/board/jse/init.S b/board/jse/init.S index 7b932b2..92f43f4 100644 --- a/board/jse/init.S +++ b/board/jse/init.S @@ -52,8 +52,6 @@ #include #include -#define cpc0_cr0 0xB1 - .globl ext_bus_cntlr_init ext_bus_cntlr_init: mflr r4 /* save link register */ @@ -84,16 +82,16 @@ ext_bus_cntlr_init: /* Memory Bank 0 (Flash) initialization */ /*----------------------------------------------------------------- */ - addi r4,0,pb0ap - mtdcr ebccfga,r4 + addi r4,0,PB1AP + mtdcr EBC0_CFGADDR,r4 addis r4,0,0x9B01 ori r4,r4,0x5480 - mtdcr ebccfgd,r4 + mtdcr EBC0_CFGDATA,r4 - addi r4,0,pb0cr - mtdcr ebccfga,r4 + addi r4,0,PB0CR + mtdcr EBC0_CFGADDR,r4 addis r4,0,0xFFF1 /* BAS=0xFFF,BS=0x0(1MB),BU=0x3(R/W), */ ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ - mtdcr ebccfgd,r4 + mtdcr EBC0_CFGDATA,r4 blr -- cgit v1.1