From 716c1dcb41389e865af1edde2ca15f2c567984cf Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@pollux.(none)>
Date: Sun, 25 Sep 2005 18:49:35 +0200
Subject: Cleanup

---
 board/integratorap/platform.S | 64 +++++++++++++++++++++----------------------
 1 file changed, 32 insertions(+), 32 deletions(-)

(limited to 'board/integratorap/platform.S')

diff --git a/board/integratorap/platform.S b/board/integratorap/platform.S
index fefee72..2d9b436 100644
--- a/board/integratorap/platform.S
+++ b/board/integratorap/platform.S
@@ -36,7 +36,7 @@ reset_cpu:
 
 reset_failed:
 	b	reset_failed
- 
+
 /* set up the platform, once the cpu has been initialized */
 .globl platformsetup
 platformsetup:
@@ -48,45 +48,45 @@ platformsetup:
 	 * itself should be performed in cpu/arm<>/start.S
 	 * This function affects only the core module or board settings
 	 */
- 
+
 #ifdef CONFIG_CM_INIT
 	/* CM has an initialization register
 	 * - bits in it are wired into test-chip pins to force
 	 *   reset defaults
 	 * - may need to change its contents for U-Boot
 	 */
- 
+
 	/* set the desired CM specific value */
 	mov	r2,#CMMASK_LOWVEC	/* Vectors at 0x00000000 for all */
- 
+
 #if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
 	orr	r2,r2,#CMMASK_INIT_102
 #else
- 
+
 #if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \
      !defined (CONFIG_CM940T)
- 
+
 #ifdef	CONFIG_CM_MULTIPLE_SSRAM
 	/* set simple mapping		  */
 	and	r2,r2,#CMMASK_MAP_SIMPLE
 #endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */
- 
+
 #ifdef	CONFIG_CM_TCRAM
 	/* disable TCRAM		  */
 	and	r2,r2,#CMMASK_TCRAM_DISABLE
 #endif /* #ifdef CONFIG_CM_TCRAM	  */
- 
+
 #if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \
 	    defined (CONFIG_CM1136JF_S)
 
 	and	r2,r2,#CMMASK_LE
- 
+
 #endif /* cpu with little endian initialization */
- 
+
 	orr	r2,r2,#CMMASK_CMxx6_COMMON
- 
+
 #endif /* CMxx6 code */
- 
+
 #endif /* ARM102xxE value */
 
 	/* read CM_INIT	   */
@@ -96,7 +96,7 @@ platformsetup:
 	and	r3,r1,r2
 	cmp	r3,r2
 	beq	init_reg_OK
- 
+
 	/* lock for change */
 	mov	r3, #CMVAL_LOCK
 	and	r3,r3,#CMMASK_LOCK
@@ -107,16 +107,16 @@ platformsetup:
 	str	r1, [r0, #OS_INIT]
 	mov	r1, #CMVAL_UNLOCK
 	str	r1, [r0, #OS_LOCK]
- 
+
 	/* soft reset so new values used */
 	b	reset_cpu
- 
+
 init_reg_OK:
- 
+
 #endif /* CONFIG_CM_INIT */
- 
+
 	mov	pc, lr
- 
+
 #ifdef	CONFIG_CM_SPD_DETECT
 	/* Fast memory is available for the DRAM data
 	 * - ensure it has been transferred, then summarize the data
@@ -128,13 +128,13 @@ dram_query:
 	/* set up SDRAM info				  */
 	/* - based on example code from the CM User Guide */
 	mov	r0, #CM_BASE
- 
+
 readspdbit:
 	ldr	r1, [r0, #OS_SDRAM]	/* read the SDRAM register */
 	and	r1, r1, #0x20		/* mask SPD bit (5)	   */
 	cmp	r1, #0x20		/* test if set		   */
 	bne	readspdbit
- 
+
 setupsdram:
 	add	r0, r0, #OS_SPD		/* address the copy of the SDP data */
 	ldrb	r1, [r0, #3]		/* number of row address lines	    */
@@ -148,40 +148,40 @@ setupsdram:
 	bne	not16
 	mov	r6, #0x2		/* store size and CAS latency of 2  */
 	b	writesize
- 
+
 not16:
 	cmp	r5, #0x20		/* is it  32MB? */
 	bne	not32
 	mov	r6, #0x6
 	b	writesize
- 
+
 not32:
 	cmp	r5, #0x40		/* is it  64MB? */
 	bne	not64
 	mov	r6, #0xa
 	b	writesize
- 
+
 not64:
 	cmp	r5, #0x80		/* is it 128MB? */
 	bne	not128
 	mov	r6, #0xe
 	b	writesize
- 
+
 not128:
 	/* if it is none of these sizes then it is either 256MB, or
 	 * there is no SDRAM fitted so default to 256MB
 	 */
 	mov	r6, #0x12
- 
+
 writesize:
 	mov	r1, r1, ASL#8		/* row addr lines from SDRAM reg */
 	orr	r2, r1, r2, ASL#12	/* OR in column address lines	 */
 	orr	r3, r2, r3, ASL#16	/* OR in number of banks	 */
 	orr	r6, r6, r3		/* OR in size and CAS latency	 */
 	str	r6, [r0, #OS_SDRAM]	/* store SDRAM parameters	 */
- 
+
 #endif /* #ifdef CONFIG_CM_SPD_DETECT */
- 
+
 	ldmfd	r13!,{r4-r6,pc}			/* back to caller */
 
 #ifdef	CONFIG_CM_REMAP
@@ -191,23 +191,23 @@ writesize:
 .globl cm_remap
 cm_remap:
 	stmfd	r13!,{r4-r10,lr}
- 
+
 	mov	r0, #CM_BASE
 	ldr	r1, [r0, #OS_CTRL]
 	orr	r1, r1, #CMMASK_REMAP	/* set remap and led bits */
 	str	r1, [r0, #OS_CTRL]
- 
+
 	/* Now 0x00000000 is writeable, replace the vectors  */
 	ldr	r0, =_start	/* r0 <- start of vectors	    */
 	ldr	r2, =_armboot_start	/* r2 <- past vectors		    */
 	sub	r1,r1,r1		/* destination 0x00000000	    */
- 
+
 copy_vec:
 	ldmia	r0!, {r3-r10}		/* copy from source address [r0]    */
 	stmia	r1!, {r3-r10}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	ble	copy_vec
- 
+
 	ldmfd	r13!,{r4-r10,pc}	/* back to caller		    */
- 
+
 #endif /* #ifdef CONFIG_CM_REMAP */
-- 
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