From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/icecube/flash.c | 26 +++++++++++++------------- board/icecube/icecube.c | 32 ++++++++++++++++---------------- 2 files changed, 29 insertions(+), 29 deletions(-) (limited to 'board/icecube') diff --git a/board/icecube/flash.c b/board/icecube/flash.c index 0aa78eb..7a433b3 100644 --- a/board/icecube/flash.c +++ b/board/icecube/flash.c @@ -24,7 +24,7 @@ #include #ifndef CONFIG_FLASH_CFI_DRIVER -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ /* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it * has nothing to do with the flash chip being 8-bit or 16-bit. @@ -66,12 +66,12 @@ unsigned long flash_init (void) int i; extern void flash_preinit(void); extern void flash_afterinit(ulong); - ulong flashbase = CFG_FLASH_BASE; + ulong flashbase = CONFIG_SYS_FLASH_BASE; flash_preinit(); /* Init: no FLASHes known */ - for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) { + for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { memset(&flash_info[i], 0, sizeof(flash_info_t)); flash_info[i].size = @@ -80,12 +80,12 @@ unsigned long flash_init (void) size += flash_info[i].size; flashbase += 0x800000; } -#if CFG_MONITOR_BASE >= CFG_FLASH_BASE +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE+monitor_flash_len-1, - flash_get_info(CFG_MONITOR_BASE)); + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, + flash_get_info(CONFIG_SYS_MONITOR_BASE)); #endif #ifdef CONFIG_ENV_IS_IN_FLASH @@ -122,14 +122,14 @@ static flash_info_t *flash_get_info(ulong base) int i; flash_info_t * info; - for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i ++) { info = & flash_info[i]; if (info->size && info->start[0] <= base && base <= info->start[0] + info->size - 1) break; } - return i == CFG_MAX_FLASH_BANKS ? 0 : info; + return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; } /*----------------------------------------------------------------------- @@ -360,7 +360,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) udelay (1000); while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); if (intel) { @@ -374,14 +374,14 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) } /* show that we're waiting */ - if ((get_timer(last)) > CFG_HZ) {/* every second */ + if ((get_timer(last)) > CONFIG_SYS_HZ) {/* every second */ putc ('.'); last = get_timer(0); } } /* show that we're waiting */ - if ((get_timer(last)) > CFG_HZ) { /* every second */ + if ((get_timer(last)) > CONFIG_SYS_HZ) { /* every second */ putc ('.'); last = get_timer(0); } @@ -482,7 +482,7 @@ static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data) /* data polling for D7 */ while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *dest = (FPW)0x00F000F0; /* reset bank */ res = 1; } diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index d84ab3a..7524461 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -87,7 +87,7 @@ void lite5200b_wakeup(void) #define lite5200b_wakeup() #endif -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { long hi_addr_bit = hi_addr ? 0x01000000 : 0; @@ -130,7 +130,7 @@ static void sdram_start (int hi_addr) /* * ATTENTION: Although partially referenced initdram does NOT make real use - * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE + * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE * is something else than 0x00000000. */ @@ -141,7 +141,7 @@ phys_size_t initdram (int board_type) ulong dramsize2 = 0; uint svr, pvr; -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT ulong test1, test2; /* setup SDRAM chip selects */ @@ -162,9 +162,9 @@ phys_size_t initdram (int board_type) /* find RAM size using SDRAM CS0 only */ sdram_start(0); - test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); + test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); sdram_start(1); - test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); + test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); if (test1 > test2) { sdram_start(0); dramsize = test1; @@ -190,10 +190,10 @@ phys_size_t initdram (int board_type) /* find RAM size using SDRAM CS1 only */ if (!dramsize) sdram_start(0); - test2 = test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + test2 = test1 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000); if (!dramsize) { sdram_start(1); - test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + test2 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000); } if (test1 > test2) { sdram_start(0); @@ -215,7 +215,7 @@ phys_size_t initdram (int board_type) *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */ } -#else /* CFG_RAMBOOT */ +#else /* CONFIG_SYS_RAMBOOT */ /* retrieve size of memory connected to SDRAM CS0 */ dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF; @@ -233,7 +233,7 @@ phys_size_t initdram (int board_type) dramsize2 = 0; } -#endif /* CFG_RAMBOOT */ +#endif /* CONFIG_SYS_RAMBOOT */ /* * On MPC5200B we need to set the special configuration delay in the @@ -263,7 +263,7 @@ phys_size_t initdram (int board_type) phys_size_t initdram (int board_type) { ulong dramsize = 0; -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT ulong test1, test2; /* setup and enable SDRAM chip selects */ @@ -282,9 +282,9 @@ phys_size_t initdram (int board_type) /* find RAM size */ sdram_start(0); - test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); + test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); sdram_start(1); - test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); + test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); if (test1 > test2) { sdram_start(0); dramsize = test1; @@ -295,12 +295,12 @@ phys_size_t initdram (int board_type) /* set SDRAM end address according to size */ *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); -#else /* CFG_RAMBOOT */ +#else /* CONFIG_SYS_RAMBOOT */ /* Retrieve amount of SDRAM available */ dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15); -#endif /* CFG_RAMBOOT */ +#endif /* CONFIG_SYS_RAMBOOT */ return dramsize; } @@ -340,9 +340,9 @@ void flash_afterinit(ulong size) { if (size == 0x800000) { /* adjust mapping */ *(vu_long *)MPC5XXX_BOOTCS_START = *(vu_long *)MPC5XXX_CS0_START = - START_REG(CFG_BOOTCS_START | size); + START_REG(CONFIG_SYS_BOOTCS_START | size); *(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP = - STOP_REG(CFG_BOOTCS_START | size, size); + STOP_REG(CONFIG_SYS_BOOTCS_START | size, size); } } -- cgit v1.1