From 54bb84115da5f43b0e23f1c57f7d1ab80748005c Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 26 Dec 2012 05:50:20 +0000 Subject: mx53loco: Call PMIC related functions from board_late_init() Since commit c733681 (pmic: Extend PMIC framework to support multiple instances of PMIC devices) mx53loco fails to allocate the memory for PMIC: U-Boot 2013.01-rc2-dirty (Dec 20 2012 - 15:55:01) Board: MX53 LOCO I2C: ready DRAM: 1 GiB pmic_alloc: No available memory for allocation! pmic_init: POWER allocation error! CPU: Freescale i.MX53 family rev2.0 at 800 MHz Reset cause: POR MMC: FSL_SDHC: 0, FSL_SDHC: 1 Calling the PMIC related functions at a later stage, ie, from board_late_init() fixes the issue. Reported-by: Robert Nelson Signed-off-by: Fabio Estevam Tested-by: Stefano Babic --- board/freescale/mx53loco/mx53loco.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'board/freescale') diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 2c8cb7a..63a4f8b 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -462,12 +462,18 @@ int board_init(void) mxc_set_sata_internal_clock(); setup_iomux_i2c(); + + lcd_enable(); + + return 0; +} + +int board_late_init(void) +{ if (!power_init()) clock_1GHz(); print_cpuinfo(); - lcd_enable(); - return 0; } -- cgit v1.1 From e660c44d9e3b4b6d156e5a6dacf62ced86fac216 Mon Sep 17 00:00:00 2001 From: Ashok Date: Wed, 7 Nov 2012 07:37:15 +0000 Subject: mx35pdk:Use IMX_GPIO_NR macro Use IMX_GPO_NR macro Signed-off-by: Ashok Kumar Reddy Acked-by: Stefano Babic --- board/freescale/mx35pdk/mx35pdk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board/freescale') diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index 2aa000f..b7f474e 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -274,7 +274,7 @@ int board_late_init(void) mxc_request_iomux(MX35_PIN_COMPARE, MUX_CONFIG_GPIO); mxc_iomux_set_input(MUX_IN_GPIO1_IN_5, INPUT_CTL_PATH0); - gpio_direction_output(37, 1); + gpio_direction_output(IMX_GPIO_NR(2, 5), 1); } val = mc9sdz60_reg_read(MC9SDZ60_REG_GPIO_1) | 0x04; -- cgit v1.1 From de7d02aeba2a8d3d2b2f688ee396cdc112fc4e29 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 30 Dec 2012 14:14:59 +0000 Subject: mx6qsabresd: add usdhc2 and usdhc4 support The on-board number of available usdhc devices is something board specific. The patch moves CONFIG_SYS_FSL_USDHC_NUM out of mx6qsabre_common.h and adds usdhc2 and usdhc4 support for mx6qsabresd board. To keep the default mmc device for environment same as before (usdhc3), it moves CONFIG_SYS_MMC_ENV_DEV out of mx6qsabre_common.h and changes it to 1 for mx6qsabresd. Signed-off-by: Shawn Guo --- board/freescale/mx6qsabresd/mx6qsabresd.c | 80 ++++++++++++++++++++++++++++--- 1 file changed, 74 insertions(+), 6 deletions(-) (limited to 'board/freescale') diff --git a/board/freescale/mx6qsabresd/mx6qsabresd.c b/board/freescale/mx6qsabresd/mx6qsabresd.c index 0240fb5..65c4a1a 100644 --- a/board/freescale/mx6qsabresd/mx6qsabresd.c +++ b/board/freescale/mx6qsabresd/mx6qsabresd.c @@ -86,6 +86,20 @@ static void setup_iomux_enet(void) gpio_set_value(IMX_GPIO_NR(1, 25), 1); } +iomux_v3_cfg_t const usdhc2_pads[] = { + MX6Q_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_NANDF_D4__USDHC2_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_NANDF_D5__USDHC2_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_NANDF_D6__USDHC2_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_NANDF_D7__USDHC2_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_NANDF_D2__GPIO_2_2 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + iomux_v3_cfg_t const usdhc3_pads[] = { MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -100,28 +114,82 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6Q_PAD_NANDF_D0__GPIO_2_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; +iomux_v3_cfg_t const usdhc4_pads[] = { + MX6Q_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } #ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg usdhc_cfg[1] = { +struct fsl_esdhc_cfg usdhc_cfg[3] = { + {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, }; +#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 2) +#define USDHC3_CD_GPIO IMX_GPIO_NR(2, 0) + int board_mmc_getcd(struct mmc *mmc) { - gpio_direction_input(IMX_GPIO_NR(2, 0)); - return !gpio_get_value(IMX_GPIO_NR(2, 0)); + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + + switch (cfg->esdhc_base) { + case USDHC2_BASE_ADDR: + return !gpio_get_value(USDHC2_CD_GPIO); + case USDHC3_BASE_ADDR: + return !gpio_get_value(USDHC3_CD_GPIO); + default: + return 1; /* eMMC/uSDHC4 is always present */ + } } int board_mmc_init(bd_t *bis) { - imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + int i; + + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + switch (i) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + gpio_direction_input(USDHC2_CD_GPIO); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + gpio_direction_input(USDHC3_CD_GPIO); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + break; + case 2: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) than supported by the board\n", i + 1); + return 0; + } + + if (fsl_esdhc_initialize(bis, &usdhc_cfg[i])) + printf("Warning: failed to initialize mmc dev %d\n", i); + } - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); + return 0; } #endif -- cgit v1.1 From d22925108e46491900815c9ec3c32122ead80d8e Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 28 Dec 2012 04:05:28 +0000 Subject: mx53loco: Remove unneeded 'retval' variable commit c73368150 (pmic: Extend PMIC framework to support multiple instances of PMIC devices) introduced an extra 'retval' variable, but this is not necessary since we have already the variable 'ret' in place. So use 'ret' to store the return values from the pmic related calls and remove 'retval'. Signed-off-by: Fabio Estevam --- board/freescale/mx53loco/mx53loco.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'board/freescale') diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 63a4f8b..b1bfb90 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -345,12 +345,11 @@ static int power_init(void) unsigned int val; int ret = -1; struct pmic *p; - int retval; if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) { - retval = pmic_dialog_init(I2C_PMIC); - if (retval) - return retval; + ret = pmic_dialog_init(I2C_PMIC); + if (ret) + return ret; p = pmic_get("DIALOG_PMIC"); if (!p) @@ -370,9 +369,9 @@ static int power_init(void) } if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) { - retval = pmic_init(I2C_PMIC); - if (retval) - return retval; + ret = pmic_init(I2C_PMIC); + if (ret) + return ret; p = pmic_get("FSL_PMIC"); if (!p) -- cgit v1.1 From 085e728aa56a71f0e52bd657a441b4bf9212841a Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 28 Dec 2012 04:05:29 +0000 Subject: mx53loco: Improve error handling on power_init() Make the error handling more robust. Check if each one of the PMIC writes fail and if they do, just return immediately. Also, print the cause for the failures. Signed-off-by: Fabio Estevam --- board/freescale/mx53loco/mx53loco.c | 61 +++++++++++++++++++++++++++++++------ 1 file changed, 51 insertions(+), 10 deletions(-) (limited to 'board/freescale') diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index b1bfb90..60cd4f0 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -343,7 +343,7 @@ static void setup_iomux_i2c(void) static int power_init(void) { unsigned int val; - int ret = -1; + int ret; struct pmic *p; if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) { @@ -358,14 +358,33 @@ static int power_init(void) /* Set VDDA to 1.25V */ val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V; ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val); + if (ret) { + printf("Writing to BUCKCORE_REG failed: %d\n", ret); + return ret; + } - ret |= pmic_reg_read(p, DA9053_SUPPLY_REG, &val); + pmic_reg_read(p, DA9053_SUPPLY_REG, &val); val |= DA9052_SUPPLY_VBCOREGO; - ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, val); + ret = pmic_reg_write(p, DA9053_SUPPLY_REG, val); + if (ret) { + printf("Writing to SUPPLY_REG failed: %d\n", ret); + return ret; + } /* Set Vcc peripheral to 1.30V */ - ret |= pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62); - ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62); + ret = pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62); + if (ret) { + printf("Writing to BUCKPRO_REG failed: %d\n", ret); + return ret; + } + + ret = pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62); + if (ret) { + printf("Writing to SUPPLY_REG failed: %d\n", ret); + return ret; + } + + return ret; } if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) { @@ -381,28 +400,50 @@ static int power_init(void) pmic_reg_read(p, REG_SW_0, &val); val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708; ret = pmic_reg_write(p, REG_SW_0, val); + if (ret) { + printf("Writing to REG_SW_0 failed: %d\n", ret); + return ret; + } /* Set VCC as 1.30V on SW2 */ pmic_reg_read(p, REG_SW_1, &val); val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708; - ret |= pmic_reg_write(p, REG_SW_1, val); + ret = pmic_reg_write(p, REG_SW_1, val); + if (ret) { + printf("Writing to REG_SW_1 failed: %d\n", ret); + return ret; + } /* Set global reset timer to 4s */ pmic_reg_read(p, REG_POWER_CTL2, &val); val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708; - ret |= pmic_reg_write(p, REG_POWER_CTL2, val); + ret = pmic_reg_write(p, REG_POWER_CTL2, val); + if (ret) { + printf("Writing to REG_POWER_CTL2 failed: %d\n", ret); + return ret; + } /* Set VUSBSEL and VUSBEN for USB PHY supply*/ pmic_reg_read(p, REG_MODE_0, &val); val |= (VUSBSEL_MC34708 | VUSBEN_MC34708); - ret |= pmic_reg_write(p, REG_MODE_0, val); + ret = pmic_reg_write(p, REG_MODE_0, val); + if (ret) { + printf("Writing to REG_MODE_0 failed: %d\n", ret); + return ret; + } /* Set SWBST to 5V in auto mode */ val = SWBST_AUTO; - ret |= pmic_reg_write(p, SWBST_CTRL, val); + ret = pmic_reg_write(p, SWBST_CTRL, val); + if (ret) { + printf("Writing to SWBST_CTRL failed: %d\n", ret); + return ret; + } + + return ret; } - return ret; + return -1; } static void clock_1GHz(void) -- cgit v1.1