From 833b6435de3e8cf5b06ba81cb1b2b50e044269ff Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Thu, 27 Sep 2012 10:19:58 +0000 Subject: mx5/6: Define default SoC input clock frequencies MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Define default SoC input clock frequencies for i.MX5/6 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau Cc: Stefano Babic Cc: Jason Liu Cc: Matt Sealey Cc: Fabio Estevam --- board/freescale/mx53loco/mx53loco.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board/freescale') diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 8f82125..6543209 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -394,7 +394,7 @@ static int power_init(void) static void clock_1GHz(void) { int ret; - u32 ref_clk = CONFIG_SYS_MX5_HCLK; + u32 ref_clk = MXC_HCLK; /* * After increasing voltage to 1.25V, we can switch * CPU clock to 1GHz and DDR to 400MHz safely -- cgit v1.1