From 5bf3ee7227a9d1685c3234af91cd9dd2569fcd6f Mon Sep 17 00:00:00 2001 From: "Ye.Li" Date: Fri, 6 Jun 2014 16:57:33 +0800 Subject: ENGR00315894-37 MX6 SabreSD: Correct IPU DI pix fmt for LDB The DC mapping for LVDS666 is different from that for RGB666. Currently, we set IPU DI pixel format to be LVDS666 and set LDB data width to be 24bit. This happens to make the display work normally somehow. But, the two configurations are wrong and don't match with each other. This patch corrects the IPU DI output pixel format from LVDS666 to RGB666 and LDB data width from 24bit to 18bit. Signed-off-by: Liu Ying Signed-off-by: Ye.Li --- board/freescale/mx6sabresd/mx6sabresd.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) (limited to 'board/freescale') diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index ca468cd..1ce47e7 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -841,22 +841,12 @@ static void do_enable_hdmi(struct display_info_t const *dev) imx_enable_hdmi_phy(); } -static void enable_lvds(struct display_info_t const *dev) -{ - struct iomuxc *iomux = (struct iomuxc *) - IOMUXC_BASE_ADDR; - u32 reg = readl(&iomux->gpr[2]); - reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT | - IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT; - writel(reg, &iomux->gpr[2]); -} - static struct display_info_t const displays[] = {{ .bus = -1, .addr = 0, .pixfmt = IPU_PIX_FMT_RGB666, .detect = NULL, - .enable = enable_lvds, + .enable = NULL, .mode = { .name = "Hannstar-XGA", .refresh = 60, @@ -922,7 +912,8 @@ int board_video_skip(void) ret = ipuv3_fb_init(&displays[i].mode, 0, displays[i].pixfmt); if (!ret) { - displays[i].enable(displays+i); + if (displays[i].enable) + displays[i].enable(displays+i); printf("Display: %s (%ux%u)\n", displays[i].mode.name, displays[i].mode.xres, -- cgit v1.1