From cb753850e8af5a224d7c08b4fd1d258082d3bbd5 Mon Sep 17 00:00:00 2001 From: Shaohui Xie Date: Mon, 21 Apr 2014 11:21:03 +0800 Subject: powerpc/t4240: updated RCW and PBI for rev2.0 Updated the RCW for rev2.0 which uses new frequency settings as below: Clock Configuration: CPU0:1666.667 MHz, CPU1:1666.667 MHz, CPU2:1666.667 MHz, CPU3:1666.667 MHz, CPU4:1666.667 MHz, CPU5:1666.667 MHz, CPU6:1666.667 MHz, CPU7:1666.667 MHz, CPU8:1666.667 MHz, CPU9:1666.667 MHz, CPU10:1666.667 MHz, CPU11:1666.667MHz, CCB:733.333 MHz, DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:183.333 MHz FMAN1: 733.333 MHz FMAN2: 733.333 MHz QMAN: 366.667 MHz PME: 533.333 MHz Remove workaround of IFC bus speed and SERDES A-006031 of rev1.0. Signed-off-by: Shaohui Xie Reviewed-by: York Sun --- board/freescale/t4qds/t4_rcw.cfg | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'board/freescale/t4qds/t4_rcw.cfg') diff --git a/board/freescale/t4qds/t4_rcw.cfg b/board/freescale/t4qds/t4_rcw.cfg index 74df01a..3e56817 100644 --- a/board/freescale/t4qds/t4_rcw.cfg +++ b/board/freescale/t4qds/t4_rcw.cfg @@ -1,7 +1,7 @@ #PBL preamble and RCW header aa55aa55 010e0100 #serdes protocol 1_28_6_12 -120c0019 0c101915 00000000 00000000 -04383063 30548c00 6c020000 1d000000 +16070019 18101916 00000000 00000000 +04383060 30548c00 ec020000 f5000000 00000000 ee0000ee 00000000 000307fc -00000000 00000000 00000000 00000020 +00000000 00000000 00000000 00000028 -- cgit v1.1