From 8ca78f2c89cd058e498fa438f57accc2e810bb98 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Fri, 29 Oct 2010 17:59:24 -0500 Subject: fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org --- board/freescale/p1022ds/p1022ds.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'board/freescale/p1022ds') diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index ee93e8b..7cb549b 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -225,7 +225,7 @@ static void configure_pcie(struct fsl_pci_info *info, set_next_law(info->mem_phys, law_size_bits(info->mem_size), info->law); set_next_law(info->io_phys, law_size_bits(info->io_size), info->law); is_endpoint = fsl_setup_hose(hose, info->regs); - printf(" PCIE%u connected to %s as %s (base addr %lx)\n", + printf("PCIE%u: connected to %s as %s (base addr %lx)\n", info->pci_num, connected, is_endpoint ? "Endpoint" : "Root Complex", info->regs); bus_number = fsl_pci_init_port(info, hose, bus_number); @@ -255,7 +255,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info, 1); configure_pcie(&pci_info, &pcie1_hose, serdes_slot_name(PCIE1)); } else { - printf(" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */ @@ -266,7 +266,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info, 2); configure_pcie(&pci_info, &pcie2_hose, serdes_slot_name(PCIE2)); } else { - printf(" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */ @@ -277,7 +277,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info, 3); configure_pcie(&pci_info, &pcie3_hose, serdes_slot_name(PCIE3)); } else { - printf(" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */ -- cgit v1.1