From 68088ceed7eb059d1aa50ffe7c372cf8b058797e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Mon, 6 May 2013 01:33:51 +0000 Subject: imx: mx35pdk: Fix MUX2_CTR GPIO MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit MUX2_CTR is on GPIO1[5], not GPIO2[5], and it needs to be set high in order to connect the FEC. Signed-off-by: Benoît Thébaudeau --- board/freescale/mx35pdk/mx35pdk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board/freescale/mx35pdk/mx35pdk.c') diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index 12e84d7..9f667d2 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -245,7 +245,7 @@ int board_late_init(void) imx_iomux_v3_setup_pad(MX35_PAD_COMPARE__GPIO1_5); - gpio_direction_output(IMX_GPIO_NR(2, 5), 1); + gpio_direction_output(IMX_GPIO_NR(1, 5), 1); } val = mc9sdz60_reg_read(MC9SDZ60_REG_GPIO_1) | 0x04; -- cgit v1.1