From 5df4b0ad0dff3cef1bd6660bcc8cba028c80adcb Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 31 Jan 2011 20:36:02 -0600 Subject: powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq() Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq() and every 86xx board uses get_bus_freq(). If implement get_ddr_freq() as a static inline to call get_bus_freq() we can remove fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq() directly. Signed-off-by: Kumar Gala --- board/freescale/mpc8641hpcn/ddr.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'board/freescale/mpc8641hpcn') diff --git a/board/freescale/mpc8641hpcn/ddr.c b/board/freescale/mpc8641hpcn/ddr.c index 8dc249b..07bb92f 100644 --- a/board/freescale/mpc8641hpcn/ddr.c +++ b/board/freescale/mpc8641hpcn/ddr.c @@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address) i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t)); } -unsigned int fsl_ddr_get_mem_data_rate(void) -{ - return get_bus_freq(0); -} - void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd, unsigned int ctrl_num) { @@ -144,7 +139,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, /* Get clk_adjust, cpo, write_data_delay, according to the board ddr * freqency and n_banks specified in board_specific_parameters table. */ - ddr_freq = fsl_ddr_get_mem_data_rate() / 1000000; + ddr_freq = get_ddr_freq(0) / 1000000; for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { if (pdimm[j].n_ranks > 0) { for (i = 0; i < num_params; i++) { -- cgit v1.1