From 10795f42cb94e71bcb262b615084f69dd886399a Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 2 Dec 2008 16:08:36 -0600 Subject: 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala Acked-by: Andy Fleming --- board/freescale/mpc8548cds/mpc8548cds.c | 4 ++-- board/freescale/mpc8548cds/tlb.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'board/freescale/mpc8548cds') diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index 90e89bc..ff8d26f 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -306,7 +306,7 @@ pci_init_board(void) /* outbound memory */ pci_set_region(r++, - CONFIG_SYS_PCI1_MEM_BASE, + CONFIG_SYS_PCI1_MEM_BUS, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_SIZE, PCI_REGION_MEM); @@ -390,7 +390,7 @@ pci_init_board(void) /* outbound memory */ pci_set_region(r++, - CONFIG_SYS_PCIE1_MEM_BASE, + CONFIG_SYS_PCIE1_MEM_BUS, CONFIG_SYS_PCIE1_MEM_PHYS, CONFIG_SYS_PCIE1_MEM_SIZE, PCI_REGION_MEM); diff --git a/board/freescale/mpc8548cds/tlb.c b/board/freescale/mpc8548cds/tlb.c index eab212a..e96c9a7 100644 --- a/board/freescale/mpc8548cds/tlb.c +++ b/board/freescale/mpc8548cds/tlb.c @@ -62,14 +62,14 @@ struct fsl_e_tlb_entry tlb_table[] = { /* * TLB 2: 256M Non-cacheable, guarded */ - SET_TLB_ENTRY(1, CONFIG_SYS_RIO_MEM_BASE, CONFIG_SYS_RIO_MEM_BASE, + SET_TLB_ENTRY(1, CONFIG_SYS_RIO_MEM_BUS, CONFIG_SYS_RIO_MEM_BUS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 2, BOOKE_PAGESZ_256M, 1), /* * TLB 3: 256M Non-cacheable, guarded */ - SET_TLB_ENTRY(1, CONFIG_SYS_RIO_MEM_BASE + 0x10000000, CONFIG_SYS_RIO_MEM_BASE + 0x10000000, + SET_TLB_ENTRY(1, CONFIG_SYS_RIO_MEM_BUS + 0x10000000, CONFIG_SYS_RIO_MEM_BUS + 0x10000000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 3, BOOKE_PAGESZ_256M, 1), #endif -- cgit v1.1