From e58fe95784d2514fc9c21028dc59f2b319a35d80 Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Thu, 16 Aug 2007 22:53:09 -0500 Subject: mpc83xx: move freescale boards to boards/freescale includes build fixes. Signed-off-by: Kim Phillips --- board/freescale/mpc8313erdb/Makefile | 50 ++++++++++++ board/freescale/mpc8313erdb/config.mk | 1 + board/freescale/mpc8313erdb/mpc8313erdb.c | 121 +++++++++++++++++++++++++++ board/freescale/mpc8313erdb/sdram.c | 130 ++++++++++++++++++++++++++++++ 4 files changed, 302 insertions(+) create mode 100644 board/freescale/mpc8313erdb/Makefile create mode 100644 board/freescale/mpc8313erdb/config.mk create mode 100644 board/freescale/mpc8313erdb/mpc8313erdb.c create mode 100644 board/freescale/mpc8313erdb/sdram.c (limited to 'board/freescale/mpc8313erdb') diff --git a/board/freescale/mpc8313erdb/Makefile b/board/freescale/mpc8313erdb/Makefile new file mode 100644 index 0000000..a987e510 --- /dev/null +++ b/board/freescale/mpc8313erdb/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o sdram.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) crv $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/mpc8313erdb/config.mk b/board/freescale/mpc8313erdb/config.mk new file mode 100644 index 0000000..f768264 --- /dev/null +++ b/board/freescale/mpc8313erdb/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c new file mode 100644 index 0000000..861c143 --- /dev/null +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -0,0 +1,121 @@ +/* + * Copyright (C) Freescale Semiconductor, Inc. 2006-2007 + * + * Author: Scott Wood + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#if defined(CONFIG_OF_FLAT_TREE) +#include +#elif defined(CONFIG_OF_LIBFDT) +#include +#endif +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ +#ifndef CFG_8313ERDB_BROKEN_PMC + volatile immap_t *im = (immap_t *)CFG_IMMR; + + if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) + gd->flags |= GD_FLG_SILENT; +#endif + + return 0; +} + +int checkboard(void) +{ + puts("Board: Freescale MPC8313ERDB\n"); + return 0; +} + +static struct pci_region pci_regions[] = { + { + bus_start: CFG_PCI1_MEM_BASE, + phys_start: CFG_PCI1_MEM_PHYS, + size: CFG_PCI1_MEM_SIZE, + flags: PCI_REGION_MEM | PCI_REGION_PREFETCH + }, + { + bus_start: CFG_PCI1_MMIO_BASE, + phys_start: CFG_PCI1_MMIO_PHYS, + size: CFG_PCI1_MMIO_SIZE, + flags: PCI_REGION_MEM + }, + { + bus_start: CFG_PCI1_IO_BASE, + phys_start: CFG_PCI1_IO_PHYS, + size: CFG_PCI1_IO_SIZE, + flags: PCI_REGION_IO + } +}; + +void pci_init_board(void) +{ + volatile immap_t *immr = (volatile immap_t *)CFG_IMMR; + volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; + volatile law83xx_t *pci_law = immr->sysconf.pcilaw; + struct pci_region *reg[] = { pci_regions }; + int warmboot; + + /* Enable all 3 PCI_CLK_OUTPUTs. */ + clk->occr |= 0xe0000000; + + /* + * Configure PCI Local Access Windows + */ + pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR; + pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; + + pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR; + pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; + + warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM; +#ifndef CFG_8313ERDB_BROKEN_PMC + warmboot |= immr->pmc.pmccr1 & PMCCR1_POWER_OFF; +#endif + + mpc83xx_pci_init(1, reg, warmboot); +} + +#if defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ +#if defined(CONFIG_OF_FLAT_TREE) + u32 *p; + int len; + + p = ft_get_prop(blob, "/memory/reg", &len); + if (p != NULL) { + *p++ = cpu_to_be32(bd->bi_memstart); + *p = cpu_to_be32(bd->bi_memsize); + } +#endif + ft_cpu_setup(blob, bd); +#ifdef CONFIG_PCI + ft_pci_setup(blob, bd); +#endif +} +#endif diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c new file mode 100644 index 0000000..e6e8410 --- /dev/null +++ b/board/freescale/mpc8313erdb/sdram.c @@ -0,0 +1,130 @@ +/* + * Copyright (C) Freescale Semiconductor, Inc. 2006-2007 + * + * Authors: Nick.Spence@freescale.com + * Wilson.Lo@freescale.com + * scottwood@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +#include +#include + +#include + +#ifndef CFG_8313ERDB_BROKEN_PMC +static void resume_from_sleep(void) +{ + DECLARE_GLOBAL_DATA_PTR; + u32 magic = *(u32 *)0; + + typedef void (*func_t)(void); + func_t resume = *(func_t *)4; + + if (magic == 0xf5153ae5) + resume(); + + gd->flags &= ~GD_FLG_SILENT; + puts("\nResume from sleep failed: bad magic word\n"); +} +#endif + +/* Fixed sdram init -- doesn't use serial presence detect. + * + * This is useful for faster booting in configs where the RAM is unlikely + * to be changed, or for things like NAND booting where space is tight. + */ +static long fixed_sdram(void) +{ + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + u32 msize = CFG_DDR_SIZE * 1024 * 1024; + u32 msize_log2 = __ilog2(msize); + + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12; + im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); + im->sysconf.ddrcdr = CFG_DDRCDR_VALUE; + + /* + * Erratum DDR3 requires a 50ms delay after clearing DDRCDR[DDR_cfg], + * or the DDR2 controller may fail to initialize correctly. + */ + udelay(50000); + + im->ddr.csbnds[0].csbnds = (msize - 1) >> 24; + im->ddr.cs_config[0] = CFG_DDR_CONFIG; + + /* Currently we use only one CS, so disable the other bank. */ + im->ddr.cs_config[1] = 0; + + im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL; + im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3; + im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1; + im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2; + im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0; + +#ifndef CFG_8313ERDB_BROKEN_PMC + if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) + im->ddr.sdram_cfg = CFG_SDRAM_CFG | SDRAM_CFG_BI; + else +#endif + im->ddr.sdram_cfg = CFG_SDRAM_CFG; + + im->ddr.sdram_cfg2 = CFG_SDRAM_CFG2; + im->ddr.sdram_mode = CFG_DDR_MODE; + im->ddr.sdram_mode2 = CFG_DDR_MODE_2; + + im->ddr.sdram_interval = CFG_DDR_INTERVAL; + sync(); + + /* enable DDR controller */ + im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; + + return msize; +} + +long int initdram(int board_type) +{ + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + volatile lbus83xx_t *lbc = &im->lbus; + u32 msize; + + if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) + return -1; + + /* DDR SDRAM - Main SODIMM */ + msize = fixed_sdram(); + + /* Local Bus setup lbcr and mrtpr */ + lbc->lbcr = CFG_LBC_LBCR; + lbc->mrtpr = CFG_LBC_MRTPR; + sync(); + +#ifndef CFG_8313ERDB_BROKEN_PMC + if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) + resume_from_sleep(); +#endif + + /* return total bus SDRAM size(bytes) -- DDR */ + return msize; +} -- cgit v1.1