From e2f95e3a6ab4e40ad5c8864ff8ee0195a1388601 Mon Sep 17 00:00:00 2001 From: Yuan Yao Date: Wed, 9 Nov 2016 11:19:54 +0800 Subject: arm: ls1021a: improve the core frequency to 1.2GHZ Change core clock to 1.2GHz in the configurations for SD and NAND boot. Signed-off-by: Yuan Yao Reviewed-by: York Sun --- board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg | 2 +- board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'board/freescale/ls1021atwr') diff --git a/board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg b/board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg index 205606f..f94997d 100644 --- a/board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg +++ b/board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg @@ -2,7 +2,7 @@ aa55aa55 01ee0100 #enable IFC, disable QSPI and DSPI -0608000a 00000000 00000000 00000000 +0608000c 00000000 00000000 00000000 30000000 00007900 60040a00 21046000 00000000 00000000 00000000 20000000 00080000 881b7340 00000000 00000000 diff --git a/board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg b/board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg index 6767e09..541b604 100644 --- a/board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg +++ b/board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg @@ -2,7 +2,7 @@ aa55aa55 01ee0100 #disable IFC, enable QSPI and DSPI -0608000a 00000000 00000000 00000000 +0608000c 00000000 00000000 00000000 30000000 00007900 60040a00 21046000 00000000 00000000 00000000 20000000 20024800 881b7340 00000000 00000000 -- cgit v1.1