From 787964b8118b47a50bda796a315068639977c884 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Tue, 24 Sep 2013 15:58:35 +0530 Subject: boards/c29xpcie: Update TLB and LAW size for IFC NAND, CPLD NAND,CPLD AMASK register is programmed for 64K size. so Update TLB & LAW size accordingly. Signed-off-by: Prabhakar Kushwaha --- board/freescale/c29xpcie/tlb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'board/freescale/c29xpcie/tlb.c') diff --git a/board/freescale/c29xpcie/tlb.c b/board/freescale/c29xpcie/tlb.c index ddd1ef8..84844ee 100644 --- a/board/freescale/c29xpcie/tlb.c +++ b/board/freescale/c29xpcie/tlb.c @@ -46,11 +46,11 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS, MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 4, BOOKE_PAGESZ_4K, 1), + 0, 4, BOOKE_PAGESZ_64K, 1), SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 5, BOOKE_PAGESZ_16K, 1), + 0, 5, BOOKE_PAGESZ_64K, 1), SET_TLB_ENTRY(1, CONFIG_SYS_PLATFORM_SRAM_BASE, CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS, -- cgit v1.1