From 64501c669851e45dd47699349dae6b5798c075a3 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Tue, 2 Jul 2013 09:21:04 +0530 Subject: board/bsc9132qds: Add DSP side tlb and laws BSC9132QDS is a Freescale Reference Design Board for BSC9132 SoC which is a integrated device that contains two powerpc e500v2 cores and two DSP starcores. To support DSP starcore -Creating LAW and TLB for DSP-CCSR space. -Creating LAW for DSP-core subsystem M2 and M3 memory -Creating LAW for 1GB DDR which is connected exclusively to DSP-cores Signed-off-by: Manish Jaggi Signed-off-by: Priyanka Jain Acked-by: York Sun --- board/freescale/bsc9132qds/tlb.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'board/freescale/bsc9132qds/tlb.c') diff --git a/board/freescale/bsc9132qds/tlb.c b/board/freescale/bsc9132qds/tlb.c index 6d82353..02655e9 100644 --- a/board/freescale/bsc9132qds/tlb.c +++ b/board/freescale/bsc9132qds/tlb.c @@ -41,6 +41,11 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 1, BOOKE_PAGESZ_1M, 1), + /* CCSRBAR (DSP) */ + SET_TLB_ENTRY(1, CONFIG_SYS_FSL_DSP_CCSRBAR, + CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS, MAS3_SW|MAS3_SR, + MAS2_I|MAS2_G, 0, 2, BOOKE_PAGESZ_1M, 1), + #ifndef CONFIG_SPL_BUILD SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS, MAS3_SX|MAS3_SR, MAS2_W|MAS2_G, -- cgit v1.1