From a2ac1b3a7d8e685e8fe3805b3169f3dac5c06cf8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Mon, 1 Oct 2012 08:36:25 +0000 Subject: mxc: Fix SDHC multi-instance clock MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: Benoît Thébaudeau Cc: Stefano Babic Cc: Eric Bénard Cc: Otavio Salvador Cc: Fabio Estevam Cc: Jason Liu Cc: Matt Sealey Cc: Andy Fleming --- board/esg/ima3-mx53/ima3-mx53.c | 1 + 1 file changed, 1 insertion(+) (limited to 'board/esg/ima3-mx53') diff --git a/board/esg/ima3-mx53/ima3-mx53.c b/board/esg/ima3-mx53/ima3-mx53.c index e947330..41d6bb6 100644 --- a/board/esg/ima3-mx53/ima3-mx53.c +++ b/board/esg/ima3-mx53/ima3-mx53.c @@ -217,6 +217,7 @@ int board_mmc_init(bd_t *bis) PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); return fsl_esdhc_initialize(bis, &esdhc_cfg); } #endif -- cgit v1.1