From ff5fb8a6ccba56e3482d0e297d8cfb7faa040811 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 8 Jan 2008 12:49:58 +0100 Subject: ppc4xx: Update PLB/PCI divider for PMC440 board This patch updates the PLB/PCI divider when running at 400MHz CPU frequency from 4 to 3 which results in 44MHz PCI sync clock. Signed-off-by: Matthias Fuchs --- board/esd/pmc440/cmd_pmc440.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'board/esd/pmc440') diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c index d588d8c..350af48 100644 --- a/board/esd/pmc440/cmd_pmc440.c +++ b/board/esd/pmc440/cmd_pmc440.c @@ -280,10 +280,10 @@ int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] if (argc > 1) { if (!strcmp(argv[1], "400")) { - /* PLB=133MHz, PLB/PCI=4 */ + /* PLB=133MHz, PLB/PCI=3 */ printf("Bootstrapping for 400MHz\n"); sdsdp[0]=0x8678624e; - sdsdp[1]=0x0947a030; + sdsdp[1]=0x095fa030; sdsdp[2]=0x40082350; sdsdp[3]=0x0d050000; } else if (!strcmp(argv[1], "533")) { -- cgit v1.1