From e55ca7e2624988f82d6f77ddab54246621260c8b Mon Sep 17 00:00:00 2001 From: wdenk Date: Thu, 1 Jul 2004 21:40:08 +0000 Subject: Patch by Andrea Marson, 11 Jun 2004: Update for PPChameleon board: - support for SysClk @ 25MHz - support for Silicon Motion SM712 VGA controller - some clean ups --- board/dave/PPChameleonEVB/PPChameleonEVB.c | 72 +++++++++++++++++++++--------- board/dave/PPChameleonEVB/flash.c | 9 ++++ 2 files changed, 59 insertions(+), 22 deletions(-) (limited to 'board/dave/PPChameleonEVB') diff --git a/board/dave/PPChameleonEVB/PPChameleonEVB.c b/board/dave/PPChameleonEVB/PPChameleonEVB.c index b08b119..2b12f97 100644 --- a/board/dave/PPChameleonEVB/PPChameleonEVB.c +++ b/board/dave/PPChameleonEVB/PPChameleonEVB.c @@ -29,22 +29,9 @@ #include #include -/* ------------------------------------------------------------------------- */ -#if 0 -#define FPGA_DEBUG -#endif - -/* fpga configuration data - gzip compressed and generated by bin2c */ -const unsigned char fpgadata[] = -{ -#include "fpgadata.c" -}; +/* ------------------------------------------------------------------------- */ -/* - * include common fpga code (for esd boards) - */ -#include "../common/fpga.c" /* Prototypes */ @@ -60,13 +47,13 @@ int board_early_init_f (void) * IRQ 0-15 405GP internally generated; active high; level sensitive * IRQ 16 405GP internally generated; active low; level sensitive * IRQ 17-24 RESERVED - * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive - * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive - * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive - * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive - * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive - * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive - * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive + * IRQ 25 (EXT IRQ 0) + * IRQ 26 (EXT IRQ 1) + * IRQ 27 (EXT IRQ 2) + * IRQ 28 (EXT IRQ 3) + * IRQ 29 (EXT IRQ 4) + * IRQ 30 (EXT IRQ 5) + * IRQ 31 (EXT IRQ 6) */ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ mtdcr(uicer, 0x00000000); /* disable all ints */ @@ -268,8 +255,13 @@ nand_init(void) { ulong totlen = 0; -#if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME) || \ +/* + The HI model is equipped with a large block NAND chip not supported yet + by U-Boot (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI) +*/ + +#if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME) debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE); totlen += nand_probe (CFG_NAND0_BASE); #endif /* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */ @@ -280,3 +272,39 @@ nand_init(void) printf ("%4lu MB\n", totlen >>20); } #endif + +#ifdef CONFIG_CFB_CONSOLE +# ifdef CONFIG_CONSOLE_EXTRA_INFO +# include +extern GraphicDevice smi; + +void video_get_info_str (int line_number, char *info) +{ + uint pvr = get_pvr (); + + /* init video info strings for graphic console */ + switch (line_number) { + case 1: + switch (pvr) { + case PVR_405EP_RB: + sprintf (info, " IBM PowerPC 405EP Rev. B"); + break; + default: + sprintf (info, " IBM PowerPC 405EP Rev. "); + break; + } + return; + case 2: + sprintf (info, " DAVE Srl PPChameleonEVB - www.dave-tech.it"); + return; + case 3: + sprintf (info, " %s", smi.modeIdent); + return; + } + + /* no more info lines */ + *info = 0; + return; +} +# endif /* CONFIG_CONSOLE_EXTRA_INFO */ +#endif /* CONFIG_CFB_CONSOLE */ diff --git a/board/dave/PPChameleonEVB/flash.c b/board/dave/PPChameleonEVB/flash.c index 5f67360..692d275 100644 --- a/board/dave/PPChameleonEVB/flash.c +++ b/board/dave/PPChameleonEVB/flash.c @@ -50,6 +50,9 @@ unsigned long flash_init (void) unsigned long base; int size_val = 0; + debug("[%s, %d] Entering ...\n", __FUNCTION__, __LINE__); + debug("[%s, %d] flash_info = 0x%08X ...\n", __FUNCTION__, __LINE__, flash_info); + /* Init: no FLASHes known */ for (i=0; i