From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/cpu86/config.mk | 2 +- board/cpu86/cpu86.c | 32 ++++++++++++++++---------------- board/cpu86/cpu86.h | 26 +++++++++++++------------- board/cpu86/flash.c | 32 ++++++++++++++++---------------- 4 files changed, 46 insertions(+), 46 deletions(-) (limited to 'board/cpu86') diff --git a/board/cpu86/config.mk b/board/cpu86/config.mk index 00354c4..5fe0ca0 100644 --- a/board/cpu86/config.mk +++ b/board/cpu86/config.mk @@ -25,7 +25,7 @@ # CPU86 boards # -# This should be equal to the CFG_FLASH_BASE define in config_CPU86.h +# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_CPU86.h # for the "final" configuration, with U-Boot in flash, or the address # in RAM where U-Boot is loaded at for debugging. # diff --git a/board/cpu86/cpu86.c b/board/cpu86/cpu86.c index 23ec283..bc7ebfe 100644 --- a/board/cpu86/cpu86.c +++ b/board/cpu86/cpu86.c @@ -225,7 +225,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, */ maxsize = (1 + (~orx | 0x7fff)) / 2; - /* Since CFG_SDRAM_BASE is always 0 (??), we assume that + /* Since CONFIG_SYS_SDRAM_BASE is always 0 (??), we assume that * we are configuring CS1 if base != 0 */ sdmr_ptr = &memctl->memc_psdmr; @@ -250,7 +250,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, * accessing the SDRAM with a single-byte transaction." * * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. + * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. */ *sdmr_ptr = sdmr | PSDMR_OP_PREA; @@ -261,7 +261,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, *base = c; *sdmr_ptr = sdmr | PSDMR_OP_MRW; - *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */ + *(base + CONFIG_SYS_MRS_OFFS) = c; /* setting MR on address lines */ *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN; *base = c; @@ -275,37 +275,37 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, phys_size_t initdram (int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT ulong size8, size9; #endif long psize; psize = 32 * 1024 * 1024; - memctl->memc_mptpr = CFG_MPTPR; - memctl->memc_psrt = CFG_PSRT; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; + memctl->memc_psrt = CONFIG_SYS_PSRT; -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT /* 60x SDRAM setup: */ - size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL, - (uchar *) CFG_SDRAM_BASE); - size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL, - (uchar *) CFG_SDRAM_BASE); + size8 = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR2_8COL, + (uchar *) CONFIG_SYS_SDRAM_BASE); + size9 = try_init (memctl, CONFIG_SYS_PSDMR_9COL, CONFIG_SYS_OR2_9COL, + (uchar *) CONFIG_SYS_SDRAM_BASE); if (size8 < size9) { psize = size9; printf ("(60x:9COL) "); } else { - psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL, - (uchar *) CFG_SDRAM_BASE); + psize = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR2_8COL, + (uchar *) CONFIG_SYS_SDRAM_BASE); printf ("(60x:8COL) "); } -#endif /* CFG_RAMBOOT */ +#endif /* CONFIG_SYS_RAMBOOT */ icache_enable (); @@ -315,6 +315,6 @@ phys_size_t initdram (int board_type) #if defined(CONFIG_CMD_DOC) void doc_init (void) { - doc_probe (CFG_DOC_BASE); + doc_probe (CONFIG_SYS_DOC_BASE); } #endif diff --git a/board/cpu86/cpu86.h b/board/cpu86/cpu86.h index cf7852c..ca0c39f 100644 --- a/board/cpu86/cpu86.h +++ b/board/cpu86/cpu86.h @@ -6,19 +6,19 @@ #define REG8(x) (*(volatile unsigned char *)(x)) /* CPU86 register definitions */ -#define CPU86_VME_EAC REG8(CFG_BCRS_BASE + 0x00) -#define CPU86_VME_SAC REG8(CFG_BCRS_BASE + 0x01) -#define CPU86_VME_MAC REG8(CFG_BCRS_BASE + 0x02) -#define CPU86_BCR REG8(CFG_BCRS_BASE + 0x03) -#define CPU86_BSR REG8(CFG_BCRS_BASE + 0x04) -#define CPU86_WDOG_RPORT REG8(CFG_BCRS_BASE + 0x05) -#define CPU86_MBOX_IRQ REG8(CFG_BCRS_BASE + 0x04) -#define CPU86_REV REG8(CFG_BCRS_BASE + 0x07) -#define CPU86_VME_IRQMASK REG8(CFG_BCRS_BASE + 0x80) -#define CPU86_VME_IRQSTATUS REG8(CFG_BCRS_BASE + 0x81) -#define CPU86_LOCAL_IRQMASK REG8(CFG_BCRS_BASE + 0x82) -#define CPU86_LOCAL_IRQSTATUS REG8(CFG_BCRS_BASE + 0x83) -#define CPU86_PMCL_IRQSTATUS REG8(CFG_BCRS_BASE + 0x84) +#define CPU86_VME_EAC REG8(CONFIG_SYS_BCRS_BASE + 0x00) +#define CPU86_VME_SAC REG8(CONFIG_SYS_BCRS_BASE + 0x01) +#define CPU86_VME_MAC REG8(CONFIG_SYS_BCRS_BASE + 0x02) +#define CPU86_BCR REG8(CONFIG_SYS_BCRS_BASE + 0x03) +#define CPU86_BSR REG8(CONFIG_SYS_BCRS_BASE + 0x04) +#define CPU86_WDOG_RPORT REG8(CONFIG_SYS_BCRS_BASE + 0x05) +#define CPU86_MBOX_IRQ REG8(CONFIG_SYS_BCRS_BASE + 0x04) +#define CPU86_REV REG8(CONFIG_SYS_BCRS_BASE + 0x07) +#define CPU86_VME_IRQMASK REG8(CONFIG_SYS_BCRS_BASE + 0x80) +#define CPU86_VME_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x81) +#define CPU86_LOCAL_IRQMASK REG8(CONFIG_SYS_BCRS_BASE + 0x82) +#define CPU86_LOCAL_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x83) +#define CPU86_PMCL_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x84) /* Board Control Register bits */ #define CPU86_BCR_FWPT 0x01 diff --git a/board/cpu86/flash.c b/board/cpu86/flash.c index 845a3b2..8135780 100644 --- a/board/cpu86/flash.c +++ b/board/cpu86/flash.c @@ -28,7 +28,7 @@ #include #include "cpu86.h" -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /*----------------------------------------------------------------------- */ @@ -177,7 +177,7 @@ unsigned long flash_init (void) /* Init: no FLASHes known */ - for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; } @@ -186,8 +186,8 @@ unsigned long flash_init (void) /* Static FLASH Bank configuration here (only one bank) */ - size_b0 = flash_int_get_size ((ulong *) CFG_FLASH_BASE, &flash_info[0]); - size_b1 = flash_amd_get_size ((uchar *) CFG_BOOTROM_BASE, &flash_info[1]); + size_b0 = flash_int_get_size ((ulong *) CONFIG_SYS_FLASH_BASE, &flash_info[0]); + size_b1 = flash_amd_get_size ((uchar *) CONFIG_SYS_BOOTROM_BASE, &flash_info[1]); if (size_b0 > 0 || size_b1 > 0) { @@ -210,22 +210,22 @@ unsigned long flash_init (void) /* protect monitor and environment sectors */ -#if CFG_MONITOR_BASE >= CFG_BOOTROM_BASE +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_BOOTROM_BASE if (size_b1) { - /* If U-Boot is booted from ROM the CFG_MONITOR_BASE > CFG_FLASH_BASE + /* If U-Boot is booted from ROM the CONFIG_SYS_MONITOR_BASE > CONFIG_SYS_FLASH_BASE * but we shouldn't protect it. */ flash_protect (FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[1] + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[1] ); } #else -#if CFG_MONITOR_BASE >= CFG_FLASH_BASE +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE flash_protect (FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0] + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0] ); #endif #endif @@ -234,7 +234,7 @@ unsigned long flash_init (void) # ifndef CONFIG_ENV_SIZE # define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE # endif -# if CONFIG_ENV_ADDR >= CFG_BOOTROM_BASE +# if CONFIG_ENV_ADDR >= CONFIG_SYS_BOOTROM_BASE if (size_b1) { flash_protect (FLAG_PROTECT_SET, CONFIG_ENV_ADDR, @@ -382,7 +382,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) last = start; addr = (vu_char *)(info->start[l_sect]); while ((addr[0] & 0x80) != 0x80) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return 1; } @@ -434,7 +434,7 @@ AMD_DONE: last = start; while ((addr[0] & 0x00800080) != 0x00800080 || (addr[1] & 0x00800080) != 0x00800080) { - if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout (erase suspended!)\n"); /* Suspend erase */ @@ -549,7 +549,7 @@ static int write_word (flash_info_t * info, volatile unsigned long *addr, start = get_timer (0); while ((*addr & 0x00800080) != 0x00800080) { - if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { /* Suspend program */ *addr = 0x00B000B0; @@ -604,7 +604,7 @@ static int write_byte (flash_info_t *info, ulong dest, uchar data) /* data polling for D7 */ start = get_timer (0); while ((*((vu_char *)dest) & 0x80) != (data & 0x80)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { return (1); } } -- cgit v1.1