From 0e16387db1d4aacd5bf35cb6d7c1942765c0347b Mon Sep 17 00:00:00 2001 From: Matthew McClintock Date: Wed, 28 Jun 2006 10:43:36 -0500 Subject: * Add Flat Dev Tree construction for MPC85xx ADS and CDS boards Patch by Jon Loeliger 17-Jan-2006 Signed-off-by: Jon Loeliger --- board/cds/common/ft_board.c | 46 +++++++++++++++++++++++++++++++++++++++++++ board/cds/mpc8541cds/Makefile | 3 ++- board/cds/mpc8548cds/Makefile | 3 ++- board/cds/mpc8555cds/Makefile | 3 ++- 4 files changed, 52 insertions(+), 3 deletions(-) create mode 100644 board/cds/common/ft_board.c (limited to 'board/cds') diff --git a/board/cds/common/ft_board.c b/board/cds/common/ft_board.c new file mode 100644 index 0000000..73eca5e --- /dev/null +++ b/board/cds/common/ft_board.c @@ -0,0 +1,46 @@ +/* + * Copyright 2004 Freescale Semiconductor. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +#if defined(CONFIG_OF_FLAT_TREE) +#include +extern void ft_cpu_setup(void *blob, bd_t *bd); +#endif + + +#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) +void +ft_board_setup(void *blob, bd_t *bd) +{ + u32 *p; + int len; + + ft_cpu_setup(blob, bd); + + p = ft_get_prop(blob, "/memory/reg", &len); + if (p != NULL) { + *p++ = cpu_to_be32(bd->bi_memstart); + *p = cpu_to_be32(bd->bi_memsize); + } +} +#endif diff --git a/board/cds/mpc8541cds/Makefile b/board/cds/mpc8541cds/Makefile index 0d4abbd..aea6136 100644 --- a/board/cds/mpc8541cds/Makefile +++ b/board/cds/mpc8541cds/Makefile @@ -28,7 +28,8 @@ LIB = lib$(BOARD).a OBJS := $(BOARD).o \ ../common/cadmus.o \ - ../common/eeprom.o + ../common/eeprom.o \ + ../common/ft_board.o SOBJS := init.o diff --git a/board/cds/mpc8548cds/Makefile b/board/cds/mpc8548cds/Makefile index 0d4abbd..aea6136 100644 --- a/board/cds/mpc8548cds/Makefile +++ b/board/cds/mpc8548cds/Makefile @@ -28,7 +28,8 @@ LIB = lib$(BOARD).a OBJS := $(BOARD).o \ ../common/cadmus.o \ - ../common/eeprom.o + ../common/eeprom.o \ + ../common/ft_board.o SOBJS := init.o diff --git a/board/cds/mpc8555cds/Makefile b/board/cds/mpc8555cds/Makefile index 0d4abbd..aea6136 100644 --- a/board/cds/mpc8555cds/Makefile +++ b/board/cds/mpc8555cds/Makefile @@ -28,7 +28,8 @@ LIB = lib$(BOARD).a OBJS := $(BOARD).o \ ../common/cadmus.o \ - ../common/eeprom.o + ../common/eeprom.o \ + ../common/ft_board.o SOBJS := init.o -- cgit v1.1 From bf1dfffd8c26f8ecdd630a0ae4c834e751e4e452 Mon Sep 17 00:00:00 2001 From: Matthew McClintock Date: Wed, 28 Jun 2006 10:46:13 -0500 Subject: * Added VIA configuration table * Added support for PCI2 on CDS Patch by Andy Fleming 17-Mar-2006 Signed-off-by: Andy Fleming --- board/cds/common/ft_board.c | 3 ++ board/cds/common/via.c | 99 +++++++++++++++++++++++++++++++++++++++ board/cds/common/via.h | 18 +++++++ board/cds/mpc8541cds/Makefile | 3 +- board/cds/mpc8541cds/init.S | 12 ++--- board/cds/mpc8541cds/mpc8541cds.c | 32 ++++++------- board/cds/mpc8548cds/Makefile | 3 +- board/cds/mpc8548cds/init.S | 12 ++--- board/cds/mpc8548cds/mpc8548cds.c | 32 ++++++------- board/cds/mpc8555cds/Makefile | 3 +- board/cds/mpc8555cds/init.S | 12 ++--- board/cds/mpc8555cds/mpc8555cds.c | 39 ++++++++------- 12 files changed, 197 insertions(+), 71 deletions(-) create mode 100644 board/cds/common/via.c create mode 100644 board/cds/common/via.h (limited to 'board/cds') diff --git a/board/cds/common/ft_board.c b/board/cds/common/ft_board.c index 73eca5e..77d1d85 100644 --- a/board/cds/common/ft_board.c +++ b/board/cds/common/ft_board.c @@ -35,6 +35,9 @@ ft_board_setup(void *blob, bd_t *bd) u32 *p; int len; +#ifdef CONFIG_PCI + ft_pci_setup(blob, bd); +#endif ft_cpu_setup(blob, bd); p = ft_get_prop(blob, "/memory/reg", &len); diff --git a/board/cds/common/via.c b/board/cds/common/via.c new file mode 100644 index 0000000..68c8d21 --- /dev/null +++ b/board/cds/common/via.c @@ -0,0 +1,99 @@ +/* + * Copyright 2006 Freescale Semiconductor. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +/* Config the VIA chip */ +void mpc85xx_config_via(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +{ + pci_dev_t bridge; + + /* Enable USB and IDE functions */ + pci_hose_write_config_byte(hose, dev, 0x48, 0x08); + + pciauto_config_device(hose, dev); + + /* + * Force the backplane P2P bridge to have a window + * open from 0x00000000-0x00001fff in PCI I/O space. + * This allows legacy I/O (i8259, etc) on the VIA + * southbridge to be accessed. + */ + bridge = PCI_BDF(0,17,0); + pci_hose_write_config_byte(hose, bridge, PCI_IO_BASE, 0); + pci_hose_write_config_word(hose, bridge, PCI_IO_BASE_UPPER16, 0); + pci_hose_write_config_byte(hose, bridge, PCI_IO_LIMIT, 0x10); + pci_hose_write_config_word(hose, bridge, PCI_IO_LIMIT_UPPER16, 0); +} + +/* Function 1, IDE */ +void mpc85xx_config_via_usbide(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +{ + pciauto_config_device(hose, dev); + /* + * Since the P2P window was forced to cover the fixed + * legacy I/O addresses, it is necessary to manually + * place the base addresses for the IDE and USB functions + * within this window. + */ + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1ff8); + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_1, 0x1ff4); + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_2, 0x1fe8); + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_3, 0x1fe4); + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_4, 0x1fd0); +} + +/* Function 2, USB ports 0-1 */ +void mpc85xx_config_via_usb(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +{ + pciauto_config_device(hose, dev); + + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_4, 0x1fa0); +} + +/* Function 3, USB ports 2-3 */ +void mpc85xx_config_via_usb2(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +{ + pciauto_config_device(hose, dev); + + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_4, 0x1f80); +} + +/* Function 5, Power Management */ +void mpc85xx_config_via_power(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +{ + pciauto_config_device(hose, dev); + + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1e00); + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_1, 0x1dfc); + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_2, 0x1df8); +} + +/* Function 6, AC97 Interface */ +void mpc85xx_config_via_ac97(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +{ + pciauto_config_device(hose, dev); + + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1c00); +} + diff --git a/board/cds/common/via.h b/board/cds/common/via.h new file mode 100644 index 0000000..77cfacc --- /dev/null +++ b/board/cds/common/via.h @@ -0,0 +1,18 @@ +#ifndef _MPC85xx_VIA_H +void mpc85xx_config_via(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab); + +/* Function 1, IDE */ +void mpc85xx_config_via_usbide(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab); + +/* Function 2, USB ports 0-1 */ +void mpc85xx_config_via_usb(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab); + +/* Function 3, USB ports 2-3 */ +void mpc85xx_config_via_usb2(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab); + +/* Function 5, Power Management */ +void mpc85xx_config_via_power(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab); + +/* Function 6, AC97 Interface */ +void mpc85xx_config_via_ac97(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab); +#endif /* _MPC85xx_VIA_H */ diff --git a/board/cds/mpc8541cds/Makefile b/board/cds/mpc8541cds/Makefile index aea6136..d202281 100644 --- a/board/cds/mpc8541cds/Makefile +++ b/board/cds/mpc8541cds/Makefile @@ -29,7 +29,8 @@ LIB = lib$(BOARD).a OBJS := $(BOARD).o \ ../common/cadmus.o \ ../common/eeprom.o \ - ../common/ft_board.o + ../common/ft_board.o \ + ../common/via.o SOBJS := init.o diff --git a/board/cds/mpc8541cds/init.S b/board/cds/mpc8541cds/init.S index 53dcd0d..978bda5 100644 --- a/board/cds/mpc8541cds/init.S +++ b/board/cds/mpc8541cds/init.S @@ -210,8 +210,8 @@ tlb1_entry: * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M * 0xa000_0000 0xbfff_ffff PCI2 MEM 512M * 0xe000_0000 0xe000_ffff CCSR 1M - * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M - * 0xe300_0000 0xe3ff_ffff PCI2 IO 16M + * 0xe200_0000 0xe20f_ffff PCI1 IO 1M + * 0xe210_0000 0xe21f_ffff PCI2 IO 1M * 0xf000_0000 0xf7ff_ffff SDRAM 128M * 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M * 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M @@ -234,11 +234,11 @@ tlb1_entry: #define LAWBAR2 ((CFG_PCI2_MEM_BASE>>12) & 0xfffff) #define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) -#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff) -#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)) +#define LAWBAR3 ((CFG_PCI1_IO_PHYS>>12) & 0xfffff) +#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_1M)) -#define LAWBAR4 ((CFG_PCI2_IO_BASE>>12) & 0xfffff) -#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)) +#define LAWBAR4 ((CFG_PCI2_IO_PHYS>>12) & 0xfffff) +#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_1M)) /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ #define LAWBAR5 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff) diff --git a/board/cds/mpc8541cds/mpc8541cds.c b/board/cds/mpc8541cds/mpc8541cds.c index 6b8aa68..c2b3009 100644 --- a/board/cds/mpc8541cds/mpc8541cds.c +++ b/board/cds/mpc8541cds/mpc8541cds.c @@ -31,6 +31,7 @@ #include "../common/cadmus.h" #include "../common/eeprom.h" +#include "../common/via.h" #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) extern void ddr_enable_ecc(unsigned int dram_size); @@ -468,26 +469,25 @@ testdram(void) #endif #if defined(CONFIG_PCI) - -/* - * Initialize PCI Devices, report devices found. +/* For some reason the Tundra PCI bridge shows up on itself as a + * different device. Work around that by refusing to configure it. */ +void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) { } -#ifndef CONFIG_PCI_PNP static struct pci_config_table pci_mpc85xxcds_config_table[] = { - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_IDSEL_NUMBER, PCI_ANY_ID, - pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, - PCI_ENET0_MEMADDR, - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER - } }, - { } + {0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}}, + {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}}, + {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1, mpc85xx_config_via_usbide, {0,0,0}}, + {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}}, + {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}}, + {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5, mpc85xx_config_via_power, {0,0,0}}, + {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}} }; -#endif -static struct pci_controller hose = { -#ifndef CONFIG_PCI_PNP - config_table: pci_mpc85xxcds_config_table, +static struct pci_controller hose[] = { + { config_table: pci_mpc85xxcds_config_table,}, +#ifdef CONFIG_MPC85XX_PCI2 + {}, #endif }; @@ -497,7 +497,7 @@ void pci_init_board(void) { #ifdef CONFIG_PCI - extern void pci_mpc85xx_init(struct pci_controller *hose); + extern void pci_mpc85xx_init(struct pci_controller **hose); pci_mpc85xx_init(&hose); #endif diff --git a/board/cds/mpc8548cds/Makefile b/board/cds/mpc8548cds/Makefile index aea6136..d202281 100644 --- a/board/cds/mpc8548cds/Makefile +++ b/board/cds/mpc8548cds/Makefile @@ -29,7 +29,8 @@ LIB = lib$(BOARD).a OBJS := $(BOARD).o \ ../common/cadmus.o \ ../common/eeprom.o \ - ../common/ft_board.o + ../common/ft_board.o \ + ../common/via.o SOBJS := init.o diff --git a/board/cds/mpc8548cds/init.S b/board/cds/mpc8548cds/init.S index 53dcd0d..978bda5 100644 --- a/board/cds/mpc8548cds/init.S +++ b/board/cds/mpc8548cds/init.S @@ -210,8 +210,8 @@ tlb1_entry: * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M * 0xa000_0000 0xbfff_ffff PCI2 MEM 512M * 0xe000_0000 0xe000_ffff CCSR 1M - * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M - * 0xe300_0000 0xe3ff_ffff PCI2 IO 16M + * 0xe200_0000 0xe20f_ffff PCI1 IO 1M + * 0xe210_0000 0xe21f_ffff PCI2 IO 1M * 0xf000_0000 0xf7ff_ffff SDRAM 128M * 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M * 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M @@ -234,11 +234,11 @@ tlb1_entry: #define LAWBAR2 ((CFG_PCI2_MEM_BASE>>12) & 0xfffff) #define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) -#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff) -#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)) +#define LAWBAR3 ((CFG_PCI1_IO_PHYS>>12) & 0xfffff) +#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_1M)) -#define LAWBAR4 ((CFG_PCI2_IO_BASE>>12) & 0xfffff) -#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)) +#define LAWBAR4 ((CFG_PCI2_IO_PHYS>>12) & 0xfffff) +#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_1M)) /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ #define LAWBAR5 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff) diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c index 5bc0890..6eedb4a 100644 --- a/board/cds/mpc8548cds/mpc8548cds.c +++ b/board/cds/mpc8548cds/mpc8548cds.c @@ -30,6 +30,7 @@ #include "../common/cadmus.h" #include "../common/eeprom.h" +#include "../common/via.h" #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) extern void ddr_enable_ecc(unsigned int dram_size); @@ -293,26 +294,25 @@ testdram(void) #endif #if defined(CONFIG_PCI) - -/* - * Initialize PCI Devices, report devices found. +/* For some reason the Tundra PCI bridge shows up on itself as a + * different device. Work around that by refusing to configure it. */ +void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) { } -#ifndef CONFIG_PCI_PNP static struct pci_config_table pci_mpc85xxcds_config_table[] = { - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_IDSEL_NUMBER, PCI_ANY_ID, - pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, - PCI_ENET0_MEMADDR, - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER - } }, - { } + {0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}}, + {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}}, + {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1, mpc85xx_config_via_usbide, {0,0,0}}, + {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}}, + {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}}, + {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5, mpc85xx_config_via_power, {0,0,0}}, + {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}} }; -#endif -static struct pci_controller hose = { -#ifndef CONFIG_PCI_PNP - config_table: pci_mpc85xxcds_config_table, +static struct pci_controller hose[] = { + { config_table: pci_mpc85xxcds_config_table,}, +#ifdef CONFIG_MPC85XX_PCI2 + {}, #endif }; @@ -322,7 +322,7 @@ void pci_init_board(void) { #ifdef CONFIG_PCI - extern void pci_mpc85xx_init(struct pci_controller *hose); + extern void pci_mpc85xx_init(struct pci_controller **hose); pci_mpc85xx_init(&hose); #endif diff --git a/board/cds/mpc8555cds/Makefile b/board/cds/mpc8555cds/Makefile index aea6136..d202281 100644 --- a/board/cds/mpc8555cds/Makefile +++ b/board/cds/mpc8555cds/Makefile @@ -29,7 +29,8 @@ LIB = lib$(BOARD).a OBJS := $(BOARD).o \ ../common/cadmus.o \ ../common/eeprom.o \ - ../common/ft_board.o + ../common/ft_board.o \ + ../common/via.o SOBJS := init.o diff --git a/board/cds/mpc8555cds/init.S b/board/cds/mpc8555cds/init.S index 53dcd0d..978bda5 100644 --- a/board/cds/mpc8555cds/init.S +++ b/board/cds/mpc8555cds/init.S @@ -210,8 +210,8 @@ tlb1_entry: * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M * 0xa000_0000 0xbfff_ffff PCI2 MEM 512M * 0xe000_0000 0xe000_ffff CCSR 1M - * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M - * 0xe300_0000 0xe3ff_ffff PCI2 IO 16M + * 0xe200_0000 0xe20f_ffff PCI1 IO 1M + * 0xe210_0000 0xe21f_ffff PCI2 IO 1M * 0xf000_0000 0xf7ff_ffff SDRAM 128M * 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M * 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M @@ -234,11 +234,11 @@ tlb1_entry: #define LAWBAR2 ((CFG_PCI2_MEM_BASE>>12) & 0xfffff) #define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) -#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff) -#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)) +#define LAWBAR3 ((CFG_PCI1_IO_PHYS>>12) & 0xfffff) +#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_1M)) -#define LAWBAR4 ((CFG_PCI2_IO_BASE>>12) & 0xfffff) -#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)) +#define LAWBAR4 ((CFG_PCI2_IO_PHYS>>12) & 0xfffff) +#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_1M)) /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ #define LAWBAR5 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff) diff --git a/board/cds/mpc8555cds/mpc8555cds.c b/board/cds/mpc8555cds/mpc8555cds.c index 18adf5b..e15bf8f 100644 --- a/board/cds/mpc8555cds/mpc8555cds.c +++ b/board/cds/mpc8555cds/mpc8555cds.c @@ -29,6 +29,7 @@ #include "../common/cadmus.h" #include "../common/eeprom.h" +#include "../common/via.h" #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) extern void ddr_enable_ecc(unsigned int dram_size); @@ -464,38 +465,40 @@ testdram(void) } #endif -#if defined(CONFIG_PCI) - -/* - * Initialize PCI Devices, report devices found. +#ifdef CONFIG_PCI +/* For some reason the Tundra PCI bridge shows up on itself as a + * different device. Work around that by refusing to configure it */ +void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) { } -#ifndef CONFIG_PCI_PNP static struct pci_config_table pci_mpc85xxcds_config_table[] = { - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_IDSEL_NUMBER, PCI_ANY_ID, - pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, - PCI_ENET0_MEMADDR, - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER - } }, - { } + {0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}}, + {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}}, + {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1, mpc85xx_config_via_usbide, {0,0,0}}, + {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}}, + {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}}, + {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5, mpc85xx_config_via_power, {0,0,0}}, + {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}} }; -#endif -static struct pci_controller hose = { -#ifndef CONFIG_PCI_PNP + +static struct pci_controller hose[] = { + { config_table: pci_mpc85xxcds_config_table, + }, +#ifdef CONFIG_MPC85XX_PCI2 + { } #endif }; -#endif /* CONFIG_PCI */ +#endif void pci_init_board(void) { #ifdef CONFIG_PCI - extern void pci_mpc85xx_init(struct pci_controller *hose); + extern void pci_mpc85xx_init(struct pci_controller **hose); - pci_mpc85xx_init(&hose); + pci_mpc85xx_init(*pci_hose); #endif } -- cgit v1.1 From b6c5e1373b6ea0bb37a18e4aeecec00613d1cd39 Mon Sep 17 00:00:00 2001 From: Matthew McClintock Date: Wed, 28 Jun 2006 10:46:35 -0500 Subject: * Fixed a bug where 8555 PCI code used the old variable and function names Patch by Andy Fleming 17-Mar-2006 Signed-off-by: Andy Fleming --- board/cds/mpc8555cds/mpc8555cds.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'board/cds') diff --git a/board/cds/mpc8555cds/mpc8555cds.c b/board/cds/mpc8555cds/mpc8555cds.c index e15bf8f..012181c 100644 --- a/board/cds/mpc8555cds/mpc8555cds.c +++ b/board/cds/mpc8555cds/mpc8555cds.c @@ -497,8 +497,8 @@ void pci_init_board(void) { #ifdef CONFIG_PCI - extern void pci_mpc85xx_init(struct pci_controller **hose); + extern void pci_mpc85xx_init(struct pci_controller *hose); - pci_mpc85xx_init(*pci_hose); + pci_mpc85xx_init(hose); #endif } -- cgit v1.1 From 084d648b109c8984f83674043c1a7fa3885ef801 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Wed, 13 Sep 2006 10:33:56 -0500 Subject: Added code to support 2.6.18 PCI changes in u-boot * Added code to swizzle the IRQ map for the PCI --- board/cds/common/ft_board.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) (limited to 'board/cds') diff --git a/board/cds/common/ft_board.c b/board/cds/common/ft_board.c index 77d1d85..a897d04 100644 --- a/board/cds/common/ft_board.c +++ b/board/cds/common/ft_board.c @@ -24,9 +24,35 @@ #if defined(CONFIG_OF_FLAT_TREE) #include +#include "cadmus.h" + extern void ft_cpu_setup(void *blob, bd_t *bd); -#endif +static void cds_pci_fixup(void *blob) +{ + int len; + u32 *map; + int slot; + int i; + + map = ft_get_prop(blob, "/" OF_SOC "/pci@8000/interrupt-map", &len); + + len /= sizeof(u32); + + slot = get_pci_slot(); + + for (i=0;ibi_memstart); *p = cpu_to_be32(bd->bi_memsize); } + + cds_pci_fixup(blob); } #endif -- cgit v1.1 From 09f3e09e9ebcfa7919ca8931a4b5504fadd1f1d3 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Wed, 13 Sep 2006 10:34:18 -0500 Subject: Add support for eTSEC 3 & 4 on 8548 CDS * Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS. This will only work on rev 1.3 boards (but doesn't break older boards) * Cleaned up some comments to reflect the expanded role of tsec in other systems --- board/cds/mpc8548cds/mpc8548cds.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'board/cds') diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c index 6eedb4a..66219e3 100644 --- a/board/cds/mpc8548cds/mpc8548cds.c +++ b/board/cds/mpc8548cds/mpc8548cds.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "../common/cadmus.h" #include "../common/eeprom.h" @@ -327,3 +328,34 @@ pci_init_board(void) pci_mpc85xx_init(&hose); #endif } + +int last_stage_init(void) +{ + unsigned int temp; + + /* Change the resistors for the PHY */ + /* This is needed to get the RGMII working for the 1.3+ + * CDS cards */ + if (get_board_version() == 0x13) { + miiphy_write(CONFIG_MPC85XX_TSEC1_NAME, + TSEC1_PHY_ADDR, 29, 18); + + miiphy_read(CONFIG_MPC85XX_TSEC1_NAME, + TSEC1_PHY_ADDR, 30, &temp); + + temp = (temp & 0xf03f); + temp |= 2 << 9; /* 36 ohm */ + temp |= 2 << 6; /* 39 ohm */ + + miiphy_write(CONFIG_MPC85XX_TSEC1_NAME, + TSEC1_PHY_ADDR, 30, temp); + + miiphy_write(CONFIG_MPC85XX_TSEC1_NAME, + TSEC1_PHY_ADDR, 29, 3); + + miiphy_write(CONFIG_MPC85XX_TSEC1_NAME, + TSEC1_PHY_ADDR, 30, 0x8000); + } + + return 0; +} -- cgit v1.1 From 333961ae7095fc66d8a041fce1ac9ee873b09d86 Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Tue, 10 Oct 2006 17:02:22 -0500 Subject: Fix whitespace and 80-col issues. --- board/cds/common/via.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) (limited to 'board/cds') diff --git a/board/cds/common/via.c b/board/cds/common/via.c index 68c8d21..e79bd02 100644 --- a/board/cds/common/via.c +++ b/board/cds/common/via.c @@ -24,7 +24,8 @@ #include /* Config the VIA chip */ -void mpc85xx_config_via(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +void mpc85xx_config_via(struct pci_controller *hose, + pci_dev_t dev, struct pci_config_table *tab) { pci_dev_t bridge; @@ -47,7 +48,8 @@ void mpc85xx_config_via(struct pci_controller* hose, pci_dev_t dev, struct pci_c } /* Function 1, IDE */ -void mpc85xx_config_via_usbide(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +void mpc85xx_config_via_usbide(struct pci_controller *hose, + pci_dev_t dev, struct pci_config_table *tab) { pciauto_config_device(hose, dev); /* @@ -64,7 +66,8 @@ void mpc85xx_config_via_usbide(struct pci_controller* hose, pci_dev_t dev, struc } /* Function 2, USB ports 0-1 */ -void mpc85xx_config_via_usb(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +void mpc85xx_config_via_usb(struct pci_controller *hose, + pci_dev_t dev, struct pci_config_table *tab) { pciauto_config_device(hose, dev); @@ -72,7 +75,8 @@ void mpc85xx_config_via_usb(struct pci_controller* hose, pci_dev_t dev, struct p } /* Function 3, USB ports 2-3 */ -void mpc85xx_config_via_usb2(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +void mpc85xx_config_via_usb2(struct pci_controller *hose, + pci_dev_t dev, struct pci_config_table *tab) { pciauto_config_device(hose, dev); @@ -80,7 +84,8 @@ void mpc85xx_config_via_usb2(struct pci_controller* hose, pci_dev_t dev, struct } /* Function 5, Power Management */ -void mpc85xx_config_via_power(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +void mpc85xx_config_via_power(struct pci_controller *hose, + pci_dev_t dev, struct pci_config_table *tab) { pciauto_config_device(hose, dev); @@ -90,10 +95,10 @@ void mpc85xx_config_via_power(struct pci_controller* hose, pci_dev_t dev, struct } /* Function 6, AC97 Interface */ -void mpc85xx_config_via_ac97(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) +void mpc85xx_config_via_ac97(struct pci_controller *hose, + pci_dev_t dev, struct pci_config_table *tab) { pciauto_config_device(hose, dev); pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1c00); } - -- cgit v1.1 From 13a7fcdf37f6ea9429ae04c9df67f893364cfe4b Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Thu, 19 Oct 2006 11:33:52 -0500 Subject: * Fix a bunch of compiler warnings for gcc 4.0 Signed-off-by: Matthew McClintock --- board/cds/mpc8541cds/mpc8541cds.c | 4 +--- board/cds/mpc8548cds/mpc8548cds.c | 2 -- board/cds/mpc8555cds/mpc8555cds.c | 2 -- 3 files changed, 1 insertion(+), 7 deletions(-) (limited to 'board/cds') diff --git a/board/cds/mpc8541cds/mpc8541cds.c b/board/cds/mpc8541cds/mpc8541cds.c index c2b3009..a42904c 100644 --- a/board/cds/mpc8541cds/mpc8541cds.c +++ b/board/cds/mpc8541cds/mpc8541cds.c @@ -497,8 +497,6 @@ void pci_init_board(void) { #ifdef CONFIG_PCI - extern void pci_mpc85xx_init(struct pci_controller **hose); - - pci_mpc85xx_init(&hose); + pci_mpc85xx_init(hose); #endif } diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c index 66219e3..41bcf88 100644 --- a/board/cds/mpc8548cds/mpc8548cds.c +++ b/board/cds/mpc8548cds/mpc8548cds.c @@ -323,8 +323,6 @@ void pci_init_board(void) { #ifdef CONFIG_PCI - extern void pci_mpc85xx_init(struct pci_controller **hose); - pci_mpc85xx_init(&hose); #endif } diff --git a/board/cds/mpc8555cds/mpc8555cds.c b/board/cds/mpc8555cds/mpc8555cds.c index 012181c..d980ea6 100644 --- a/board/cds/mpc8555cds/mpc8555cds.c +++ b/board/cds/mpc8555cds/mpc8555cds.c @@ -497,8 +497,6 @@ void pci_init_board(void) { #ifdef CONFIG_PCI - extern void pci_mpc85xx_init(struct pci_controller *hose); - pci_mpc85xx_init(hose); #endif } -- cgit v1.1 From f5012827df11ca0c9be1df5f8b153e188dc2fa7c Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Fri, 20 Oct 2006 15:54:34 -0500 Subject: Fix compilation warnings on a few 85xx boards. Signed-off-by: Jon Loeliger --- board/cds/common/ft_board.c | 2 -- board/cds/mpc8548cds/mpc8548cds.c | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) (limited to 'board/cds') diff --git a/board/cds/common/ft_board.c b/board/cds/common/ft_board.c index a897d04..9d97905 100644 --- a/board/cds/common/ft_board.c +++ b/board/cds/common/ft_board.c @@ -45,8 +45,6 @@ static void cds_pci_fixup(void *blob) /* We rotate the interrupt pins so that the mapping * changes depending on the slot the carrier card is in. */ - int j; - map[3] = ((map[3] + slot - 2) % 4) + 1; map+=7; diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c index 41bcf88..7433ebf 100644 --- a/board/cds/mpc8548cds/mpc8548cds.c +++ b/board/cds/mpc8548cds/mpc8548cds.c @@ -329,7 +329,7 @@ pci_init_board(void) int last_stage_init(void) { - unsigned int temp; + unsigned short temp; /* Change the resistors for the PHY */ /* This is needed to get the RGMII working for the 1.3+ -- cgit v1.1