From 0c01c3e876c0db59b4075a4a7550020f0ea25981 Mon Sep 17 00:00:00 2001 From: Erik van Luijk Date: Thu, 13 Aug 2015 15:43:18 +0200 Subject: arm: at91: mpddr: allow multiple DDR controllers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The mpddr.c depends on ATMEL_BASE_MPDDRC for the base address to configure the controller. This cannot be used when there is more than one controller (i.e. AT91SAM9G45, AT91SAM9M10). Signed-off-by: Erik van Luijk [remove 'new blank line at EOF'] Signed-off-by: Andreas Bießmann --- board/atmel/sama5d3_xplained/sama5d3_xplained.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board/atmel/sama5d3_xplained') diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c index 92ed4e8..0793e4a 100644 --- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c +++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c @@ -194,7 +194,7 @@ void mem_init(void) writel(0x4, &pmc->scer); /* DDRAM2 Controller initialize */ - ddr2_init(ATMEL_BASE_DDRCS, &ddr2); + ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); } void at91_pmc_init(void) -- cgit v1.1