From 0c01c3e876c0db59b4075a4a7550020f0ea25981 Mon Sep 17 00:00:00 2001 From: Erik van Luijk Date: Thu, 13 Aug 2015 15:43:18 +0200 Subject: arm: at91: mpddr: allow multiple DDR controllers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The mpddr.c depends on ATMEL_BASE_MPDDRC for the base address to configure the controller. This cannot be used when there is more than one controller (i.e. AT91SAM9G45, AT91SAM9M10). Signed-off-by: Erik van Luijk [remove 'new blank line at EOF'] Signed-off-by: Andreas Bießmann --- board/atmel/at91sam9x5ek/at91sam9x5ek.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board/atmel/at91sam9x5ek/at91sam9x5ek.c') diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index 114ac5c..0455e2c 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -364,6 +364,6 @@ void mem_init(void) writel(csa, &matrix->ebicsa); /* DDRAM2 Controller initialize */ - ddr2_init(ATMEL_BASE_CS1, &ddr2); + ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); } #endif -- cgit v1.1