From 1615db3c1c8e0b359c15453423f8beb8c4821415 Mon Sep 17 00:00:00 2001 From: Clint Adams <[clint@debian.org]> Date: Fri, 6 May 2011 22:06:47 +0530 Subject: Initialize second PHY on OpenRD-Client and OpenRD-Ultimate Though the OpenRD-Base only has one gigabit Ethernet port, both the OpenRD-Client and OpenRD-Ultimate each have two. On the Ultimate, the PHY addresses are consecutive, but on the Client they are not. (based on <62a0952ce368acc725063a00a5ec680a639d6c27.1301040318.git.julian.pidancet@citrix.com> ) Signed-off-by: Clint Adams Cc: Albert ARIBAUD Cc: Prafulla Wadaskar Cc: Julian Pidancet --- board/Marvell/openrd/openrd.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) (limited to 'board/Marvell/openrd') diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c index 14ca88e..87939de 100644 --- a/board/Marvell/openrd/openrd.c +++ b/board/Marvell/openrd/openrd.c @@ -124,12 +124,11 @@ int board_init(void) } #ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ -void reset_phy(void) +/* Configure and enable MV88E1116/88E1121 PHY */ +void mv_phy_init(char *name) { u16 reg; u16 devadr; - char *name = "egiga0"; if (miiphy_set_current_dev(name)) return; @@ -154,6 +153,24 @@ void reset_phy(void) /* reset the phy */ miiphy_reset(name, devadr); - printf("88E1116 Initialized on %s\n", name); + printf(PHY_NO" Initialized on %s\n", name); +} + +void reset_phy(void) +{ + mv_phy_init("egiga0"); + +#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT + /* Kirkwood ethernet driver is written with the assumption that in case + * of multiple PHYs, their addresses are consecutive. But unfortunately + * in case of OpenRD-Client, PHY addresses are not consecutive.*/ + miiphy_write("egiga1", 0xEE, 0xEE, 24); +#endif + +#if defined(CONFIG_BOARD_IS_OPENRD_CLIENT) || \ + defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE) + /* configure and initialize both PHY's */ + mv_phy_init("egiga1"); +#endif } #endif /* CONFIG_RESET_PHY_R */ -- cgit v1.1