From d67be7c965949b88e2bae40ebb9de263a4f441e0 Mon Sep 17 00:00:00 2001 From: Ruchika Gupta Date: Wed, 10 Dec 2014 11:52:50 +0530 Subject: powerpc: mpc85xx: Add dummy gpio.h to enable CONFIG_OF_CONTROL If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled. It includes and then includes . As a result, all the SoCs that enable CONFIG_OF_CONTROL must have . The right fix would be to split the lib/fdtdec.c to remove dependency on GPIO. This commit adds a dummy to support OF_CONTROL for mpc85xx platform. A file mpc85xx_gpio.h exists in arch/powerpc/include/asm. The defintions in that file conflict with the ones in asm-generic/gpio.h. Hence a dummy header file has been added. This will be removed after FDT-GPIO stuff is fixed correctly. Signed-off-by: Ruchika Gupta Reviewed-by: York Sun --- arch/powerpc/include/asm/arch-mpc85xx/gpio.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 arch/powerpc/include/asm/arch-mpc85xx/gpio.h (limited to 'arch') diff --git a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h new file mode 100644 index 0000000..8beed30 --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h @@ -0,0 +1,15 @@ +/* + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * Dummy header file to enable CONFIG_OF_CONTROL. + * If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled. + * It includes via , so those SoCs that enable + * OF_CONTROL must have arch/gpio.h. + */ + +#ifndef __ASM_ARCH_MX85XX_GPIO_H +#define __ASM_ARCH_MX85XX_GPIO_H + +#endif -- cgit v1.1 From d1ccaf76a420d651b4d547e85f580fbd8f133e56 Mon Sep 17 00:00:00 2001 From: Tudor Laurentiu Date: Fri, 12 Dec 2014 10:41:26 +0200 Subject: b4860: Correct LIODN assignment for PCIe For B4 the LIODN register for PCIe is in PCIe address space and not in GUTs Signed-off-by: Poonam Aggrwal Signed-off-by: Varun Sethi Signed-off-by: Shaveta Leekha Signed-off-by: Laurentiu Tudor Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/b4860_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc85xx/b4860_ids.c b/arch/powerpc/cpu/mpc85xx/b4860_ids.c index 598f7bd..fd7f5fa 100644 --- a/arch/powerpc/cpu/mpc85xx/b4860_ids.c +++ b/arch/powerpc/cpu/mpc85xx/b4860_ids.c @@ -57,7 +57,7 @@ struct liodn_id_table liodn_tbl[] = { SET_USB_LIODN(1, "fsl-usb2-dr", 553), - SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148), + SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148), SET_DMA_LIODN(1, "fsl,elo3-dma", 147), SET_DMA_LIODN(2, "fsl,elo3-dma", 227), -- cgit v1.1 From b3f0f63223ce42592499d71dcbd4d9ac18fb3e10 Mon Sep 17 00:00:00 2001 From: Aneesh Bansal Date: Fri, 12 Dec 2014 15:35:04 +0530 Subject: powerpc/mpc85xx: Define PBI Flash Base for C29XPCIE Secure Boot CONFIG_SYS_PBI_FLASH_BASE is defined for Secure Boot on C29X Signed-off-by: Aneesh Bansal Reviewed-by: York Sun --- arch/powerpc/include/asm/fsl_secure_boot.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 14c6fc3..b4c0c99 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -12,6 +12,8 @@ #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000 #elif defined(CONFIG_BSC9132QDS) #define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000 +#elif defined(CONFIG_C29XPCIE) +#define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000 #else #define CONFIG_SYS_PBI_FLASH_BASE 0xce000000 #endif -- cgit v1.1 From f08a5db9501c9f74698e71961eb0d594ffc39209 Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Wed, 17 Dec 2014 15:38:13 +0800 Subject: powerpc/t1024: add serdes protocol 0x40 and 0x5f Add serdes protocol 0x40 and 0x5f. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/t1024_serdes.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c index 7dc8385..2ba314a 100644 --- a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c @@ -11,6 +11,7 @@ static u8 serdes_cfg_tbl[][4] = { + [0x40] = {PCIE1, PCIE1, PCIE1, PCIE1}, [0xD5] = {QSGMII_FM1_A, PCIE3, PCIE2, PCIE1}, [0xD6] = {QSGMII_FM1_A, PCIE3, PCIE2, SATA1}, [0x95] = {XFI_FM1_MAC1, PCIE3, PCIE2, PCIE1}, @@ -20,6 +21,7 @@ static u8 serdes_cfg_tbl[][4] = { [0x56] = {PCIE1, PCIE3, PCIE2, SATA1}, [0x5A] = {PCIE1, PCIE3, SGMII_FM1_DTSEC2, SATA1}, [0x5B] = {PCIE1, PCIE3, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC1}, + [0x5F] = {PCIE1, PCIE3, SGMII_2500_FM1_DTSEC2, SGMII_2500_FM1_DTSEC1}, [0x6A] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC2, SATA1}, [0x6B] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC1}, [0x6F] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_2500_FM1_DTSEC2, -- cgit v1.1 From 59d34ed022f8e0f0f34257b7b8a3d0edd24f8434 Mon Sep 17 00:00:00 2001 From: tang yuantian Date: Thu, 18 Dec 2014 10:26:34 +0800 Subject: mpc85xx: clean up the old deep sleep framework All the boards that support deep sleep feature are converted to deep sleep generic board interface. The old interface which support non-generic board is not used anymore. So clean it up. Signed-off-by: Tang Yuantian Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 10 +--------- arch/powerpc/lib/board.c | 21 --------------------- 2 files changed, 1 insertion(+), 30 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 85d32fc..4cf8853 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -424,7 +424,6 @@ void fsl_erratum_a007212_workaround(void) ulong cpu_init_f(void) { - ulong flag = 0; extern void m8560_cpm_reset (void); #if defined(CONFIG_SYS_DCSRBAR_PHYS) || \ (defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET)) @@ -499,18 +498,11 @@ ulong cpu_init_f(void) in_be32(&gur->dcsrcr); #endif -#ifdef CONFIG_SYS_DCSRBAR_PHYS -#ifdef CONFIG_DEEP_SLEEP - /* disable the console if boot from deep sleep */ - if (in_be32(&gur->scrtsr[0]) & (1 << 3)) - flag = GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; -#endif -#endif #ifdef CONFIG_SYS_FSL_ERRATUM_A007212 fsl_erratum_a007212_workaround(); #endif - return flag; + return 0; } /* Implement a dummy function for those platforms w/o SERDES */ diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index e6d5355..91645d3 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -346,13 +346,6 @@ void board_init_f(ulong bootflag) #ifdef CONFIG_PRAM ulong reg; #endif -#ifdef CONFIG_DEEP_SLEEP - const ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - struct ccsr_scfg *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG; - u32 start_addr; - typedef void (*func_t)(void); - func_t kernel_resume; -#endif /* Pointer is writable since we allocated a register for it */ gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); @@ -372,20 +365,6 @@ void board_init_f(ulong bootflag) if ((*init_fnc_ptr) () != 0) hang(); -#ifdef CONFIG_DEEP_SLEEP - /* Jump to kernel in deep sleep case */ - if (in_be32(&gur->scrtsr[0]) & (1 << 3)) { - l2cache_init(); -#if defined(CONFIG_RAMBOOT_PBL) - disable_cpc_sram(); -#endif - enable_cpc(); - start_addr = in_be32(&scfg->sparecr[1]); - kernel_resume = (func_t)start_addr; - kernel_resume(); - } -#endif - #ifdef CONFIG_POST post_bootmode_init(); post_run(NULL, POST_ROM | post_bootmode_get(NULL)); -- cgit v1.1 From 7d33a87d9ddb7a862a12c50d1c83a2f7853cc1bf Mon Sep 17 00:00:00 2001 From: Codrin Ciubotariu Date: Mon, 12 Jan 2015 14:08:30 +0200 Subject: arch/powerpc: Fix mapping of Freescale SerDes protocols The number of supported serdes protocols on Freescale SoCs has increased over time. Until now, an u64 variable have been initialized on boot with the configured protocols. However, since this number has increased (enum srds_prtcl has more than 64 values), 64 bits are no longer sufficient to hold track of all the configured protocols. This patch replaces the u64 map values with static arrays. To keep track of the number of serdes protocols, the SERDES_PRCTL_COUNT vale has been added at the end of enum srds_prtcl. This value must always be the last one. Signed-off-by: Codrin Ciubotariu Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 67 ++++++++++++++------------ arch/powerpc/include/asm/fsl_serdes.h | 1 + 2 files changed, 38 insertions(+), 30 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c index 5cfae47..c7d9622 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c @@ -15,16 +15,16 @@ #include "fsl_corenet2_serdes.h" #ifdef CONFIG_SYS_FSL_SRDS_1 -static u64 serdes1_prtcl_map; +static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT]; #endif #ifdef CONFIG_SYS_FSL_SRDS_2 -static u64 serdes2_prtcl_map; +static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT]; #endif #ifdef CONFIG_SYS_FSL_SRDS_3 -static u64 serdes3_prtcl_map; +static u8 serdes3_prtcl_map[SERDES_PRCTL_COUNT]; #endif #ifdef CONFIG_SYS_FSL_SRDS_4 -static u64 serdes4_prtcl_map; +static u8 serdes4_prtcl_map[SERDES_PRCTL_COUNT]; #endif #ifdef DEBUG @@ -83,19 +83,19 @@ static const char *serdes_prtcl_str[] = { int is_serdes_configured(enum srds_prtcl device) { - u64 ret = 0; + int ret = 0; #ifdef CONFIG_SYS_FSL_SRDS_1 - ret |= (1ULL << device) & serdes1_prtcl_map; + ret |= serdes1_prtcl_map[device]; #endif #ifdef CONFIG_SYS_FSL_SRDS_2 - ret |= (1ULL << device) & serdes2_prtcl_map; + ret |= serdes2_prtcl_map[device]; #endif #ifdef CONFIG_SYS_FSL_SRDS_3 - ret |= (1ULL << device) & serdes3_prtcl_map; + ret |= serdes3_prtcl_map[device]; #endif #ifdef CONFIG_SYS_FSL_SRDS_4 - ret |= (1ULL << device) & serdes4_prtcl_map; + ret |= serdes4_prtcl_map[device]; #endif return !!ret; @@ -171,12 +171,14 @@ int serdes_get_first_lane(u32 sd, enum srds_prtcl device) #define BCAP_OVD_MASK 0x10000000 #define BYP_CAL_MASK 0x02000000 -u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift) +void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift, + u8 serdes_prtcl_map[SERDES_PRCTL_COUNT]) { ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - u64 serdes_prtcl_map = 0; u32 cfg; int lane; + + memset(serdes_prtcl_map, 0, sizeof(serdes_prtcl_map)); #ifdef CONFIG_SYS_FSL_ERRATUM_A007186 struct ccsr_sfp_regs __iomem *sfp_regs = (struct ccsr_sfp_regs __iomem *)(CONFIG_SYS_SFP_ADDR); @@ -312,38 +314,43 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift) for (lane = 0; lane < SRDS_MAX_LANES; lane++) { enum srds_prtcl lane_prtcl = serdes_get_prtcl(sd, cfg, lane); - serdes_prtcl_map |= (1ULL << lane_prtcl); + if (unlikely(lane_prtcl >= SERDES_PRCTL_COUNT)) + debug("Unknown SerDes lane protocol %d\n", lane_prtcl); + else + serdes_prtcl_map[lane_prtcl] = 1; } - - return serdes_prtcl_map; } void fsl_serdes_init(void) { #ifdef CONFIG_SYS_FSL_SRDS_1 - serdes1_prtcl_map = serdes_init(FSL_SRDS_1, - CONFIG_SYS_FSL_CORENET_SERDES_ADDR, - FSL_CORENET2_RCWSR4_SRDS1_PRTCL, - FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT); + serdes_init(FSL_SRDS_1, + CONFIG_SYS_FSL_CORENET_SERDES_ADDR, + FSL_CORENET2_RCWSR4_SRDS1_PRTCL, + FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT, + serdes1_prtcl_map); #endif #ifdef CONFIG_SYS_FSL_SRDS_2 - serdes2_prtcl_map = serdes_init(FSL_SRDS_2, - CONFIG_SYS_FSL_CORENET_SERDES_ADDR + FSL_SRDS_2 * 0x1000, - FSL_CORENET2_RCWSR4_SRDS2_PRTCL, - FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT); + serdes_init(FSL_SRDS_2, + CONFIG_SYS_FSL_CORENET_SERDES_ADDR + FSL_SRDS_2 * 0x1000, + FSL_CORENET2_RCWSR4_SRDS2_PRTCL, + FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT, + serdes2_prtcl_map); #endif #ifdef CONFIG_SYS_FSL_SRDS_3 - serdes3_prtcl_map = serdes_init(FSL_SRDS_3, - CONFIG_SYS_FSL_CORENET_SERDES_ADDR + FSL_SRDS_3 * 0x1000, - FSL_CORENET2_RCWSR4_SRDS3_PRTCL, - FSL_CORENET2_RCWSR4_SRDS3_PRTCL_SHIFT); + serdes_init(FSL_SRDS_3, + CONFIG_SYS_FSL_CORENET_SERDES_ADDR + FSL_SRDS_3 * 0x1000, + FSL_CORENET2_RCWSR4_SRDS3_PRTCL, + FSL_CORENET2_RCWSR4_SRDS3_PRTCL_SHIFT, + serdes3_prtcl_map); #endif #ifdef CONFIG_SYS_FSL_SRDS_4 - serdes4_prtcl_map = serdes_init(FSL_SRDS_4, - CONFIG_SYS_FSL_CORENET_SERDES_ADDR + FSL_SRDS_4 * 0x1000, - FSL_CORENET2_RCWSR4_SRDS4_PRTCL, - FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT); + serdes_init(FSL_SRDS_4, + CONFIG_SYS_FSL_CORENET_SERDES_ADDR + FSL_SRDS_4 * 0x1000, + FSL_CORENET2_RCWSR4_SRDS4_PRTCL, + FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT, + serdes4_prtcl_map); #endif } diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h index 8e0e190..2dd32c2 100644 --- a/arch/powerpc/include/asm/fsl_serdes.h +++ b/arch/powerpc/include/asm/fsl_serdes.h @@ -87,6 +87,7 @@ enum srds_prtcl { SGMII_2500_FM2_DTSEC6, SGMII_2500_FM2_DTSEC9, SGMII_2500_FM2_DTSEC10, + SERDES_PRCTL_COUNT /* Keep this item the last one */ }; enum srds { -- cgit v1.1 From c2a61cd232910cb5c53d67699394dcc29e96fab8 Mon Sep 17 00:00:00 2001 From: Codrin Ciubotariu Date: Mon, 12 Jan 2015 14:08:31 +0200 Subject: arch/powerpc: Add SGMII support for the L2 Switch ports Some Freescale SoCs like T1020 and T1040 have an integrated L2 Switch. The L2 Switch ports may be connected to Ethernet PHYs over SGMII and QSGMII. Signed-off-by: Codrin Ciubotariu Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 6 ++++++ arch/powerpc/cpu/mpc85xx/t1040_serdes.c | 8 ++++---- arch/powerpc/include/asm/fsl_serdes.h | 6 ++++++ 3 files changed, 16 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c index c7d9622..acb1353 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c @@ -78,6 +78,12 @@ static const char *serdes_prtcl_str[] = { [INTERLAKEN] = "INTERLAKEN", [QSGMII_SW1_A] = "QSGMII_SW1_A", [QSGMII_SW1_B] = "QSGMII_SW1_B", + [SGMII_SW1_MAC1] = "SGMII_SW1_MAC1", + [SGMII_SW1_MAC2] = "SGMII_SW1_MAC2", + [SGMII_SW1_MAC3] = "SGMII_SW1_MAC3", + [SGMII_SW1_MAC4] = "SGMII_SW1_MAC4", + [SGMII_SW1_MAC5] = "SGMII_SW1_MAC5", + [SGMII_SW1_MAC6] = "SGMII_SW1_MAC6", }; #endif diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c index d86bb27..d5dccd5 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c @@ -33,10 +33,10 @@ static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = { PCIE2, PCIE2, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5}, [0x87] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2, PCIE3, PCIE4, SGMII_FM1_DTSEC5}, - [0x89] = {PCIE1, QSGMII_SW1_A, QSGMII_SW1_A, QSGMII_SW1_A, - PCIE2, PCIE3, QSGMII_SW1_B, SATA1}, - [0x8D] = {PCIE1, QSGMII_SW1_A, QSGMII_SW1_A, QSGMII_SW1_A, - PCIE2, QSGMII_SW1_B, QSGMII_SW1_B, QSGMII_SW1_B}, + [0x89] = {PCIE1, SGMII_SW1_MAC3, SGMII_SW1_MAC1, SGMII_SW1_MAC2, + PCIE2, PCIE3, SGMII_SW1_MAC4, SATA1}, + [0x8D] = {PCIE1, SGMII_SW1_MAC3, SGMII_SW1_MAC1, SGMII_SW1_MAC2, + PCIE2, SGMII_SW1_MAC6, SGMII_SW1_MAC4, SGMII_SW1_MAC5}, [0x8F] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, AURORA, NONE, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5}, [0xA5] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h index 2dd32c2..45e248e 100644 --- a/arch/powerpc/include/asm/fsl_serdes.h +++ b/arch/powerpc/include/asm/fsl_serdes.h @@ -87,6 +87,12 @@ enum srds_prtcl { SGMII_2500_FM2_DTSEC6, SGMII_2500_FM2_DTSEC9, SGMII_2500_FM2_DTSEC10, + SGMII_SW1_MAC1, + SGMII_SW1_MAC2, + SGMII_SW1_MAC3, + SGMII_SW1_MAC4, + SGMII_SW1_MAC5, + SGMII_SW1_MAC6, SERDES_PRCTL_COUNT /* Keep this item the last one */ }; -- cgit v1.1 From 7e40e4beb8b4560074276ab599199c66ae03d3c6 Mon Sep 17 00:00:00 2001 From: Codrin Ciubotariu Date: Wed, 21 Jan 2015 11:54:10 +0200 Subject: arch/powerpc: Initialize VSC9953 L2 Switch This patch initializes VSC9953 L2 Switch for boards that have CONFIG_VSC9953 defined in their config file. Signed-off-by: Codrin Ciubotariu --- arch/powerpc/cpu/mpc8xxx/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 2d28eb2..c92589f 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -15,6 +15,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -271,5 +272,9 @@ int cpu_eth_init(bd_t *bis) #ifdef CONFIG_FMAN_ENET fm_standard_init(bis); #endif + +#ifdef CONFIG_VSC9953 + vsc9953_init(bis); +#endif return 0; } -- cgit v1.1