From 111ec4c65208bb13f3957d5a1c84b228eb83bdde Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Mon, 2 Feb 2015 17:51:00 +0800 Subject: ARM: at91: at91sam9rlek: add mci support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch enable the MCI support for at91sam9rlek board. Signed-off-by: Josh Wu [rebase on ToT] Signed-off-by: Andreas Bießmann --- arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c index 0ec32c3..857c864 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c @@ -101,3 +101,20 @@ void at91_spi0_hw_init(unsigned long cs_mask) } } #endif + +#ifdef CONFIG_GENERIC_ATMEL_MCI +void at91_mci_hw_init(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + + at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* MCI CLK */ + at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* MCI CDA */ + at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* MCI DA0 */ + at91_set_a_periph(AT91_PIO_PORTA, 3, 0); /* MCI DA1 */ + at91_set_a_periph(AT91_PIO_PORTA, 4, 0); /* MCI DA2 */ + at91_set_a_periph(AT91_PIO_PORTA, 5, 0); /* MCI DA3 */ + + /* Enable clock */ + writel(1 << ATMEL_ID_MCI, &pmc->pcer); +} +#endif -- cgit v1.1 From 993ea97e76ba0ceec39c50fea56143506532fa16 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Wed, 4 Mar 2015 13:32:57 +0800 Subject: ARM: atmel: armv7: move spl lds to armv7 directory As the u-boot-spl.lds is used only for armv7 SoCs (includes sama5d3 and sama5d4), so move it to armv7 directory. Signed-off-by: Bo Shen --- arch/arm/mach-at91/armv7/u-boot-spl.lds | 55 +++++++++++++++++++++++++++++++++ arch/arm/mach-at91/u-boot-spl.lds | 55 --------------------------------- 2 files changed, 55 insertions(+), 55 deletions(-) create mode 100644 arch/arm/mach-at91/armv7/u-boot-spl.lds delete mode 100644 arch/arm/mach-at91/u-boot-spl.lds (limited to 'arch') diff --git a/arch/arm/mach-at91/armv7/u-boot-spl.lds b/arch/arm/mach-at91/armv7/u-boot-spl.lds new file mode 100644 index 0000000..eccca43 --- /dev/null +++ b/arch/arm/mach-at91/armv7/u-boot-spl.lds @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, + * + * (C) Copyright 2010 + * Texas Instruments, + * Aneesh V + * + * (C) 2013 Atmel Corporation + * Bo Shen + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \ + LENGTH = CONFIG_SPL_MAX_SIZE } +MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ + LENGTH = CONFIG_SPL_BSS_MAX_SIZE } + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + .text : + { + __start = .; + *(.vectors) + arch/arm/cpu/armv7/start.o (.text*) + *(.text*) + } >.sram + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram + + . = ALIGN(4); + .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram + + . = ALIGN(4); + __image_copy_end = .; + + .end : + { + *(.__end) + } >.sram + + .bss : + { + . = ALIGN(4); + __bss_start = .; + *(.bss*) + . = ALIGN(4); + __bss_end = .; + } >.sdram +} diff --git a/arch/arm/mach-at91/u-boot-spl.lds b/arch/arm/mach-at91/u-boot-spl.lds deleted file mode 100644 index eccca43..0000000 --- a/arch/arm/mach-at91/u-boot-spl.lds +++ /dev/null @@ -1,55 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, - * - * (C) Copyright 2010 - * Texas Instruments, - * Aneesh V - * - * (C) 2013 Atmel Corporation - * Bo Shen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \ - LENGTH = CONFIG_SPL_MAX_SIZE } -MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ - LENGTH = CONFIG_SPL_BSS_MAX_SIZE } - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - .text : - { - __start = .; - *(.vectors) - arch/arm/cpu/armv7/start.o (.text*) - *(.text*) - } >.sram - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram - - . = ALIGN(4); - .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram - - . = ALIGN(4); - __image_copy_end = .; - - .end : - { - *(.__end) - } >.sram - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.bss*) - . = ALIGN(4); - __bss_end = .; - } >.sdram -} -- cgit v1.1 From 8e7a96364bc29073e5246d331a11ce8602d5d6a3 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Wed, 4 Mar 2015 13:48:47 +0800 Subject: ARM: atmel: sama5d4: set non-secured for peripherals When access the programmable secure peripherals address space, it needs set them to non-secured. Signed-off-by: Bo Shen --- arch/arm/mach-at91/armv7/sama5d4_devices.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c b/arch/arm/mach-at91/armv7/sama5d4_devices.c index ef39cb7..76301d6 100644 --- a/arch/arm/mach-at91/armv7/sama5d4_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c @@ -75,6 +75,15 @@ void matrix_init(void) writel(0x00000001, &h32mx->sassr[4]); writel(0x00000001, &h32mx->srtsr[4]); + /* Configure Programmable Security peripherals on matrix 64 */ + writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]); + writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]); + writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]); + + /* Configure Programmable Security peripherals on matrix 32 */ + writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]); + writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]); + /* Enable the write protect */ writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); -- cgit v1.1