From cda1de21ded801306e05c0e2ee17ca9c60a87872 Mon Sep 17 00:00:00 2001 From: York Sun Date: Wed, 24 Aug 2011 09:40:26 -0700 Subject: powerpc/mpc8xxx: Move DDR RCW overriding to common code DDR RCW varies at different speeds. It is common for all platform. Move it out from corenet_ds. Signed-off-by: York Sun Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc8xxx/ddr/options.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/options.c b/arch/powerpc/cpu/mpc8xxx/ddr/options.c index bd9c466..89dc479 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/options.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/options.c @@ -272,6 +272,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, char buffer[HWCONFIG_BUFFER_SIZE]; char *buf = NULL; const dynamic_odt_t *pdodt = odt_unknown; + ulong ddr_freq; /* * Extract hwconfig from environment since we have not properly setup @@ -716,6 +717,20 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, if (pdimm[0].n_ranks == 4) popts->quad_rank_present = 1; + ddr_freq = get_ddr_freq(0) / 1000000; + if (popts->registered_dimm_en) { + popts->rcw_override = 1; + popts->rcw_1 = 0x000a5a00; + if (ddr_freq <= 800) + popts->rcw_2 = 0x00000000; + else if (ddr_freq <= 1066) + popts->rcw_2 = 0x00100000; + else if (ddr_freq <= 1333) + popts->rcw_2 = 0x00200000; + else + popts->rcw_2 = 0x00300000; + } + fsl_ddr_board_options(popts, pdimm, ctrl_num); return 0; -- cgit v1.1