From 51637afe98ba1745976382f64afc270f7f0b6974 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 4 Feb 2015 12:14:56 +0100 Subject: sunxi: dram: Un-inline dram helper functions Move the dram helper functions to a separate C file, rather then having them as inline helpers in dram.h. This saves 144 bytes in the .text segment for sun6i builds. Signed-off-by: Hans de Goede Reviewed-by: Simon Glass --- arch/arm/cpu/armv7/sunxi/Makefile | 1 + arch/arm/cpu/armv7/sunxi/dram_helpers.c | 37 +++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-sunxi/dram.h | 28 ++----------------------- 3 files changed, 40 insertions(+), 26 deletions(-) create mode 100644 arch/arm/cpu/armv7/sunxi/dram_helpers.c (limited to 'arch') diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index 48db744..a790a23 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -11,6 +11,7 @@ obj-y += timer.o obj-y += board.o obj-y += clock.o obj-y += cpu_info.o +obj-y += dram_helpers.o obj-y += pinmux.o obj-y += usbc.o obj-$(CONFIG_MACH_SUN6I) += prcm.o diff --git a/arch/arm/cpu/armv7/sunxi/dram_helpers.c b/arch/arm/cpu/armv7/sunxi/dram_helpers.c new file mode 100644 index 0000000..9a94e1b --- /dev/null +++ b/arch/arm/cpu/armv7/sunxi/dram_helpers.c @@ -0,0 +1,37 @@ +/* + * DRAM init helper functions + * + * (C) Copyright 2015 Hans de Goede + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +/* + * Wait up to 1s for value to be set in given part of reg. + */ +void mctl_await_completion(u32 *reg, u32 mask, u32 val) +{ + unsigned long tmo = timer_get_us() + 1000000; + + while ((readl(reg) & mask) != val) { + if (timer_get_us() > tmo) + panic("Timeout initialising DRAM\n"); + } +} + +/* + * Test if memory at offset offset matches memory at begin of DRAM + */ +bool mctl_mem_matches(u32 offset) +{ + /* Try to write different values to RAM at two addresses */ + writel(0, CONFIG_SYS_SDRAM_BASE); + writel(0xaa55aa55, CONFIG_SYS_SDRAM_BASE + offset); + /* Check if the same value is actually observed when reading back */ + return readl(CONFIG_SYS_SDRAM_BASE) == + readl(CONFIG_SYS_SDRAM_BASE + offset); +} diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h index 7ff43e6..aedd194 100644 --- a/arch/arm/include/asm/arch-sunxi/dram.h +++ b/arch/arm/include/asm/arch-sunxi/dram.h @@ -25,31 +25,7 @@ #endif unsigned long sunxi_dram_init(void); - -/* - * Wait up to 1s for value to be set in given part of reg. - */ -static inline void mctl_await_completion(u32 *reg, u32 mask, u32 val) -{ - unsigned long tmo = timer_get_us() + 1000000; - - while ((readl(reg) & mask) != val) { - if (timer_get_us() > tmo) - panic("Timeout initialising DRAM\n"); - } -} - -/* - * Test if memory at offset offset matches memory at begin of DRAM - */ -static inline bool mctl_mem_matches(u32 offset) -{ - /* Try to write different values to RAM at two addresses */ - writel(0, CONFIG_SYS_SDRAM_BASE); - writel(0xaa55aa55, CONFIG_SYS_SDRAM_BASE + offset); - /* Check if the same value is actually observed when reading back */ - return readl(CONFIG_SYS_SDRAM_BASE) == - readl(CONFIG_SYS_SDRAM_BASE + offset); -} +void mctl_await_completion(u32 *reg, u32 mask, u32 val); +bool mctl_mem_matches(u32 offset); #endif /* _SUNXI_DRAM_H */ -- cgit v1.1 From e11c6c279d823dc0d2f470c5c2e3c0a9854a640f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 10:47:28 -0700 Subject: arm: Allow lr to be saved by board code The link register value can be required on some boards (e.g. FEL mode on sunxi) so use a branch instruction to jump to save_boot_params() instead of a branch link. This requires a branch back to save_boot_params_ret so adjust the users to deal with this. For exynos just drop the function since it doesn't do anything. Signed-off-by: Simon Glass Acked-by: Siarhei Siamashka Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/cpu/armv7/exynos/spl_boot.c | 1 - arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 2 +- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 2 +- arch/arm/cpu/armv7/start.S | 7 +++++-- arch/arm/include/asm/system.h | 15 +++++++++++++++ 5 files changed, 22 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/exynos/spl_boot.c b/arch/arm/cpu/armv7/exynos/spl_boot.c index bc237c9..c7f943e 100644 --- a/arch/arm/cpu/armv7/exynos/spl_boot.c +++ b/arch/arm/cpu/armv7/exynos/spl_boot.c @@ -309,4 +309,3 @@ void board_init_r(gd_t *id, ulong dest_addr) while (1) ; } -void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {} diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S index 86c0e42..e19c7ae 100644 --- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S @@ -19,7 +19,7 @@ ENTRY(save_boot_params) ldr r1, =OMAP_SRAM_SCRATCH_BOOT_PARAMS str r0, [r1] - bx lr + b save_boot_params_ret ENDPROC(save_boot_params) ENTRY(set_pl310_ctrl_reg) diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S index 78577b1..80cb263 100644 --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S @@ -23,7 +23,7 @@ ENTRY(save_boot_params) ldr r5, [r0, #0x4] and r5, r5, #0xff str r5, [r4] - bx lr + b save_boot_params_ret ENDPROC(save_boot_params) #endif diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 70048c1..9b49ece 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -31,9 +31,12 @@ *************************************************************************/ .globl reset + .globl save_boot_params_ret reset: - bl save_boot_params + /* Allow the board to save important registers */ + b save_boot_params +save_boot_params_ret: /* * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode, * except if in HYP mode already @@ -96,7 +99,7 @@ ENDPROC(c_runtime_cpu_setup) * *************************************************************************/ ENTRY(save_boot_params) - bx lr @ back to my caller + b save_boot_params_ret @ back to my caller ENDPROC(save_boot_params) .weak save_boot_params diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 89f2294..7820486 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -142,6 +142,21 @@ void flush_l3_cache(void); #ifndef __ASSEMBLY__ +/** + * save_boot_params() - Save boot parameters before starting reset sequence + * + * If you provide this function it will be called immediately U-Boot starts, + * both for SPL and U-Boot proper. + * + * All registers are unchanged from U-Boot entry. No registers need be + * preserved. + * + * This is not a normal C function. There is no stack. Return by branching to + * save_boot_params_ret. + * + * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3); + */ + #define isb() __asm__ __volatile__ ("" : : : "memory") #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); -- cgit v1.1 From c01c71bc16d2836c3ff81af54529dab0686bca00 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 10:47:29 -0700 Subject: arm: spl: Provide for a board-specific loader Some boards have a special way of loading U-Boot that does not fit with the existing SPL code. For example sunxi uses an 'FEL' mode where U-Boot is loaded over USB. Add a CONFIG option and boot mode for this. Signed-off-by: Simon Glass Acked-by: Siarhei Siamashka Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/include/asm/spl.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index 8acd7cd..17b6f54 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -26,10 +26,14 @@ enum { BOOT_DEVICE_SPI, BOOT_DEVICE_SATA, BOOT_DEVICE_I2C, + BOOT_DEVICE_BOARD, BOOT_DEVICE_NONE }; #endif +/* Board-specific load method */ +void spl_board_load_image(void); + /* Linker symbols. */ extern char __bss_start[], __bss_end[]; -- cgit v1.1 From 942cb0b6a29f74507adeb0bce7ff7f23f69faf84 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 10:47:30 -0700 Subject: sunxi: Normalise FEL support Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of creating its own. There are some #ifdefs required in start.S. Future work will hopefully remove these. This series is available at u-boot-dm, branch sunxi-working. Signed-off-by: Simon Glass Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/cpu/armv7/start.S | 5 +- arch/arm/cpu/armv7/sunxi/Makefile | 4 +- arch/arm/cpu/armv7/sunxi/board.c | 21 ++++++++ arch/arm/cpu/armv7/sunxi/config.mk | 2 - arch/arm/cpu/armv7/sunxi/fel_utils.S | 25 +++++++++ arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds | 82 ----------------------------- arch/arm/include/asm/arch-sunxi/sys_proto.h | 10 ++++ 7 files changed, 61 insertions(+), 88 deletions(-) create mode 100644 arch/arm/cpu/armv7/sunxi/fel_utils.S delete mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds (limited to 'arch') diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 9b49ece..098a83a 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -54,7 +54,8 @@ save_boot_params_ret: * (OMAP4 spl TEXT_BASE is not 32 byte aligned. * Continue to use ROM code vector only in OMAP4 spl) */ -#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) +#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) && \ + !defined(CONFIG_SPL_FEL) /* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */ mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register bic r0, #CR_V @ V = 0 @@ -67,7 +68,9 @@ save_boot_params_ret: /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT +#ifndef CONFIG_SPL_FEL bl cpu_init_cp15 +#endif bl cpu_init_crit #endif diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index a790a23..4bb12ad 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -39,7 +39,5 @@ obj-$(CONFIG_MACH_SUN5I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN6I) += dram_sun6i.o obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN8I) += dram_sun8i.o -ifdef CONFIG_SPL_FEL -obj-y += start.o -endif +obj-y += fel_utils.o endif diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index 6e28bcd..b7492ac 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -27,6 +27,13 @@ #include +struct fel_stash { + uint32_t sp; + uint32_t lr; +}; + +struct fel_stash fel_stash __attribute__((section(".data"))); + static int gpio_init(void) { #if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F) @@ -65,6 +72,12 @@ static int gpio_init(void) return 0; } +void spl_board_load_image(void) +{ + debug("Returning to FEL sp=%x, lr=%x\n", fel_stash.sp, fel_stash.lr); + return_to_fel(fel_stash.sp, fel_stash.lr); +} + void s_init(void) { #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I @@ -95,6 +108,14 @@ void s_init(void) */ u32 spl_boot_device(void) { + /* + * Have we been asked to return to the FEL portion of the boot ROM? + * TODO: We need a more robust test here, or bracket this with + * #ifdef CONFIG_SPL_FEL. + */ + if (fel_stash.lr >= 0xffff0000 && fel_stash.lr < 0xffff4000) + return BOOT_DEVICE_BOARD; + return BOOT_DEVICE_MMC1; } diff --git a/arch/arm/cpu/armv7/sunxi/config.mk b/arch/arm/cpu/armv7/sunxi/config.mk index 00f5ffc..76ffec9 100644 --- a/arch/arm/cpu/armv7/sunxi/config.mk +++ b/arch/arm/cpu/armv7/sunxi/config.mk @@ -1,8 +1,6 @@ # Build a combined spl + u-boot image ifdef CONFIG_SPL ifndef CONFIG_SPL_BUILD -ifndef CONFIG_SPL_FEL ALL-y += u-boot-sunxi-with-spl.bin endif endif -endif diff --git a/arch/arm/cpu/armv7/sunxi/fel_utils.S b/arch/arm/cpu/armv7/sunxi/fel_utils.S new file mode 100644 index 0000000..0c1de52 --- /dev/null +++ b/arch/arm/cpu/armv7/sunxi/fel_utils.S @@ -0,0 +1,25 @@ +/* + * Utility functions for FEL mode. + * + * Copyright (c) 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +ENTRY(save_boot_params) + ldr r0, =fel_stash + str sp, [r0, #0] + str lr, [r0, #4] + b save_boot_params_ret +ENDPROC(save_boot_params) + +ENTRY(return_to_fel) + mov sp, r0 + mov lr, r1 + bx lr +ENDPROC(return_to_fel) diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds b/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds deleted file mode 100644 index 928b7c1..0000000 --- a/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2013 - * Henrik Nordstrom - * - * SPDX-License-Identifier: GPL-2.0+ - */ -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(s_init) -SECTIONS -{ - . = 0x00002000; - - . = ALIGN(4); - .text : - { - *(.text.s_init) - *(.text*) - } - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - - . = ALIGN(4); - .data : { - *(.data*) - } - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = ALIGN(4); - . = .; - - . = ALIGN(4); - .rel.dyn : { - __rel_dyn_start = .; - *(.rel*) - __rel_dyn_end = .; - } - - .dynsym : { - __dynsym_start = .; - *(.dynsym) - } - - . = ALIGN(4); - .note.gnu.build-id : - { - *(.note.gnu.build-id) - } - _end = .; - - . = ALIGN(4096); - .mmutable : { - *(.mmutable) - } - - .bss_start __rel_dyn_start (OVERLAY) : { - KEEP(*(.__bss_start)); - __bss_base = .; - } - - .bss __bss_base (OVERLAY) : { - *(.bss*) - . = ALIGN(4); - __bss_limit = .; - } - - .bss_end __bss_limit (OVERLAY) : { - KEEP(*(.__bss_end)); - } - - /DISCARD/ : { *(.dynstr*) } - /DISCARD/ : { *(.dynamic*) } - /DISCARD/ : { *(.plt*) } - /DISCARD/ : { *(.interp*) } - /DISCARD/ : { *(.gnu*) } - /DISCARD/ : { *(.note*) } -} diff --git a/arch/arm/include/asm/arch-sunxi/sys_proto.h b/arch/arm/include/asm/arch-sunxi/sys_proto.h index c3e636e..60a5bd8 100644 --- a/arch/arm/include/asm/arch-sunxi/sys_proto.h +++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h @@ -13,4 +13,14 @@ void sdelay(unsigned long); +/* return_to_fel() - Return to BROM from SPL + * + * This returns back into the BROM after U-Boot SPL has performed its initial + * init. It uses the provided lr and sp to do so. + * + * @lr: BROM link register value (return address) + * @sp: BROM stack pointer + */ +void return_to_fel(uint32_t lr, uint32_t sp); + #endif -- cgit v1.1 From 840fe95c3bcff7692c51b90ebc0d350792597ff0 Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Mon, 16 Feb 2015 10:23:59 +0200 Subject: sunxi: Support the FEL boot mode in the regular u-boot build So that the CONFIG_SPL_FEL option is not needed anymore. And the regular SPL binary, generated by the default u-boot build, is now also bootable over USB in the FEL mode. The SPL still can boot from the SD card too. A bunch of system registers need to be saved/restored in order to ensure that the IRQ handler still works in the BROM FEL code after getting control back from the SPL. This is done in the sunxi code instead of abusing ifdefs in 'start.S'. The decision whether to load the main u-boot binary from the SD card or return to the FEL code in the BROM is done at runtime. Signed-off-by: Siarhei Siamashka [hdegoede@redhat.com: Since we now restore various regs before returning to the FEL BROM code we can drop the sunxi specific #ifdefs in start.S] Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/cpu/armv7/start.S | 5 +---- arch/arm/cpu/armv7/sunxi/board.c | 35 +++++++++++++++++++++++++++++------ arch/arm/cpu/armv7/sunxi/fel_utils.S | 17 +++++++++++++++++ 3 files changed, 47 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 098a83a..9b49ece 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -54,8 +54,7 @@ save_boot_params_ret: * (OMAP4 spl TEXT_BASE is not 32 byte aligned. * Continue to use ROM code vector only in OMAP4 spl) */ -#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) && \ - !defined(CONFIG_SPL_FEL) +#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) /* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */ mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register bic r0, #CR_V @ V = 0 @@ -68,9 +67,7 @@ save_boot_params_ret: /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT -#ifndef CONFIG_SPL_FEL bl cpu_init_cp15 -#endif bl cpu_init_crit #endif diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index b7492ac..c02c015 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -30,6 +30,10 @@ struct fel_stash { uint32_t sp; uint32_t lr; + uint32_t cpsr; + uint32_t sctlr; + uint32_t vbar; + uint32_t cr; }; struct fel_stash fel_stash __attribute__((section(".data"))); @@ -108,15 +112,34 @@ void s_init(void) */ u32 spl_boot_device(void) { +#ifdef CONFIG_SPL_FEL /* - * Have we been asked to return to the FEL portion of the boot ROM? - * TODO: We need a more robust test here, or bracket this with - * #ifdef CONFIG_SPL_FEL. + * This is the legacy compile time configuration for a special FEL + * enabled build. It has many restrictions and can only boot over USB. */ - if (fel_stash.lr >= 0xffff0000 && fel_stash.lr < 0xffff4000) + return BOOT_DEVICE_BOARD; +#else + /* + * When booting from the SD card, the "eGON.BT0" signature is expected + * to be found in memory at the address 0x0004 (see the "mksunxiboot" + * tool, which generates this header). + * + * When booting in the FEL mode over USB, this signature is patched in + * memory and replaced with something else by the 'fel' tool. This other + * signature is selected in such a way, that it can't be present in a + * valid bootable SD card image (because the BROM would refuse to + * execute the SPL in this case). + * + * This branch is just making a decision at runtime whether to load + * the main u-boot binary from the SD card (if the "eGON.BT0" signature + * is found) or return to the FEL code in the BROM to wait and receive + * the main u-boot binary over USB. + */ + if (readl(4) == 0x4E4F4765 && readl(8) == 0x3054422E) /* eGON.BT0 */ + return BOOT_DEVICE_MMC1; + else return BOOT_DEVICE_BOARD; - - return BOOT_DEVICE_MMC1; +#endif } /* No confirmation data available in SPL yet. Hardcode bootmode */ diff --git a/arch/arm/cpu/armv7/sunxi/fel_utils.S b/arch/arm/cpu/armv7/sunxi/fel_utils.S index 0c1de52..bf00335 100644 --- a/arch/arm/cpu/armv7/sunxi/fel_utils.S +++ b/arch/arm/cpu/armv7/sunxi/fel_utils.S @@ -15,11 +15,28 @@ ENTRY(save_boot_params) ldr r0, =fel_stash str sp, [r0, #0] str lr, [r0, #4] + mrs lr, cpsr @ Read CPSR + str lr, [r0, #8] + mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register + str lr, [r0, #12] + mrc p15, 0, lr, c12, c0, 0 @ Read VBAR + str lr, [r0, #16] + mrc p15, 0, lr, c1, c0, 0 @ Read CP15 Control Register + str lr, [r0, #20] b save_boot_params_ret ENDPROC(save_boot_params) ENTRY(return_to_fel) mov sp, r0 mov lr, r1 + ldr r0, =fel_stash + ldr r1, [r0, #20] + mcr p15, 0, r1, c1, c0, 0 @ Write CP15 Control Register + ldr r1, [r0, #16] + mcr p15, 0, r1, c12, c0, 0 @ Write VBAR + ldr r1, [r0, #12] + mcr p15, 0, r1, c1, c0, 0 @ Write CP15 SCTLR Register + ldr r1, [r0, #8] + msr cpsr, r1 @ Write CPSR bx lr ENDPROC(return_to_fel) -- cgit v1.1