From a5986432679205df5f80f7699f7853a0e7e5a509 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 24 Aug 2011 09:14:16 -0500 Subject: powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 The MPC8536 seems to use only 3 bits for the major revision field in the SVR rather than the 4 bits used by all other processors. The most significant bit is used as a mfg code on MPC8536. Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/cpu.c | 3 --- arch/powerpc/include/asm/processor.h | 4 ++++ 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index f51829e..49c0551 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -69,9 +69,6 @@ int checkcpu (void) svr = get_svr(); major = SVR_MAJ(svr); -#ifdef CONFIG_MPC8536 - major &= 0x7; /* the msb of this nibble is a mfg code */ -#endif minor = SVR_MIN(svr); if (cpu_numcores() > 1) { diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 50af6e7..46f9989 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -1022,7 +1022,11 @@ #define SVR_FAM(svr) (((svr) >> 20) & 0xFFF) /* Family field */ #define SVR_MEM(svr) (((svr) >> 16) & 0xF) /* Member field */ +#ifdef CONFIG_MPC8536 +#define SVR_MAJ(svr) (((svr) >> 4) & 0x7) /* Major revision field*/ +#else #define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/ +#endif #define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/ /* Some parts define SVR[0:23] as the SOC version */ -- cgit v1.1