From 8ebe4f429266a7cb9011f5b3ab51226297f41210 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Wed, 22 Oct 2014 16:47:44 +0800 Subject: ARM: sunxi: Add basic A23 support The basic blocks of the A23 are similar to the A31 (sun6i). Re-use sun6i code for initial clock, gpio, and uart setup. There is no SPL support for A23, as we do not have any documentation or sample code for DRAM initialization. Signed-off-by: Chen-Yu Tsai Acked-by: Ian Campbell --- arch/arm/Kconfig | 3 +++ arch/arm/cpu/armv7/sunxi/Makefile | 2 ++ arch/arm/cpu/armv7/sunxi/board.c | 3 ++- arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++ arch/arm/include/asm/arch-sunxi/clock.h | 2 +- 5 files changed, 10 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4317b69..8f910f3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -456,6 +456,9 @@ config TARGET_SUN6I config TARGET_SUN7I bool "Support sun7i" +config TARGET_SUN8I + bool "Support sun8i" + config TARGET_SNOWBALL bool "Support snowball" diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index 2a42dca..24f1dae 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -12,10 +12,12 @@ obj-y += board.o obj-y += clock.o obj-y += pinmux.o obj-$(CONFIG_SUN6I) += prcm.o +obj-$(CONFIG_SUN8I) += prcm.o obj-$(CONFIG_SUN4I) += clock_sun4i.o obj-$(CONFIG_SUN5I) += clock_sun4i.o obj-$(CONFIG_SUN6I) += clock_sun6i.o obj-$(CONFIG_SUN7I) += clock_sun4i.o +obj-$(CONFIG_SUN8I) += clock_sun6i.o ifndef CONFIG_SPL_BUILD obj-y += cpu_info.o diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index 7d10f10..134a198 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -110,7 +110,8 @@ void reset_cpu(ulong addr) /* do some early init */ void s_init(void) { -#if !defined CONFIG_SPL_BUILD && (defined CONFIG_SUN7I || defined CONFIG_SUN6I) +#if !defined CONFIG_SPL_BUILD && (defined CONFIG_SUN7I || \ + defined CONFIG_SUN6I || defined CONFIG_SUN8I) /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c b/arch/arm/cpu/armv7/sunxi/cpu_info.c index 40c4e13..4f2a09c 100644 --- a/arch/arm/cpu/armv7/sunxi/cpu_info.c +++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c @@ -27,6 +27,8 @@ int print_cpuinfo(void) puts("CPU: Allwinner A31 (SUN6I)\n"); #elif defined CONFIG_SUN7I puts("CPU: Allwinner A20 (SUN7I)\n"); +#elif defined CONFIG_SUN8I + puts("CPU: Allwinner A23 (SUN8I)\n"); #else #warning Please update cpu_info.c with correct CPU information puts("CPU: SUNXI Family\n"); diff --git a/arch/arm/include/asm/arch-sunxi/clock.h b/arch/arm/include/asm/arch-sunxi/clock.h index 8f5d860..012c2af 100644 --- a/arch/arm/include/asm/arch-sunxi/clock.h +++ b/arch/arm/include/asm/arch-sunxi/clock.h @@ -15,7 +15,7 @@ #define CLK_GATE_CLOSE 0x0 /* clock control module regs definition */ -#ifdef CONFIG_SUN6I +#if defined(CONFIG_SUN6I) || defined(CONFIG_SUN8I) #include #else #include -- cgit v1.1