From e9024ef27d0fc011ac36100c61dbd92025c96108 Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Mon, 3 Feb 2014 06:59:02 -0600 Subject: ARM: O5/dra7xx: Add SATA boot support Add the SATA boot support for OMAP5 and dra7xx. Renamed the omap_sata_init to the common init_sata(int dev) for commonality in with sata stack. Added the ROM boot device ID for SATA. Signed-off-by: Dan Murphy Reviewed-by: Roger Quadros Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/omap-common/sata.c | 3 ++- arch/arm/include/asm/arch-omap5/sata.h | 9 --------- arch/arm/include/asm/arch-omap5/spl.h | 1 + 3 files changed, 3 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/omap-common/sata.c b/arch/arm/cpu/armv7/omap-common/sata.c index f5468c4..cad4fee 100644 --- a/arch/arm/cpu/armv7/omap-common/sata.c +++ b/arch/arm/cpu/armv7/omap-common/sata.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include "pipe3-phy.h" @@ -31,7 +32,7 @@ struct omap_pipe3 sata_phy = { .dpll_map = dpll_map_sata, }; -int omap_sata_init(void) +int init_sata(int dev) { int ret; u32 val; diff --git a/arch/arm/include/asm/arch-omap5/sata.h b/arch/arm/include/asm/arch-omap5/sata.h index 2ca8947..b69165b 100644 --- a/arch/arm/include/asm/arch-omap5/sata.h +++ b/arch/arm/include/asm/arch-omap5/sata.h @@ -36,13 +36,4 @@ #define TI_SATA_IDLE_SMART_WAKE (0x3 << 2) #define TI_SATA_IDLE_SMART (0x2 << 2) -#ifdef CONFIG_SCSI_AHCI_PLAT -int omap_sata_init(void); -#else -static inline int omap_sata_init(void) -{ - return 0; -} -#endif /* CONFIG_SCSI_AHCI_PLAT */ - #endif /* _TI_SATA_H */ diff --git a/arch/arm/include/asm/arch-omap5/spl.h b/arch/arm/include/asm/arch-omap5/spl.h index 2d5a62e..4a279cf 100644 --- a/arch/arm/include/asm/arch-omap5/spl.h +++ b/arch/arm/include/asm/arch-omap5/spl.h @@ -15,6 +15,7 @@ #define BOOT_DEVICE_MMC1 5 #define BOOT_DEVICE_MMC2 6 #define BOOT_DEVICE_MMC2_2 7 +#define BOOT_DEVICE_SATA 9 #define BOOT_DEVICE_SPI 10 #define BOOT_DEVICE_UART 0x43 -- cgit v1.1 From 56746d80105a9d0fd4ff287953b7e5c029f9850d Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 19 Feb 2014 22:10:04 +0900 Subject: microblaze: remove an empty file arch/microblaze/lib/time.c Commit 779bf42c moved timer functions from arch/microblaze/lib/time.c to arch/microblaze/cpu/timer.c. But the empty file, arch/microblaze/lib/time.c has been remaining probably for a human mistake. Signed-off-by: Masahiro Yamada Cc: Michal Simek --- arch/microblaze/lib/time.c | 0 1 file changed, 0 insertions(+), 0 deletions(-) delete mode 100644 arch/microblaze/lib/time.c (limited to 'arch') diff --git a/arch/microblaze/lib/time.c b/arch/microblaze/lib/time.c deleted file mode 100644 index e69de29..0000000 -- cgit v1.1 From 9e4140329ee9a787d0f96ac2829d618d47f7973f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 4 Feb 2014 17:24:24 +0900 Subject: kbuild: change out-of-tree build This commit changes the working directory where the build process occurs. Before this commit, build process occurred under the source tree for both in-tree and out-of-tree build. That's why we needed to add $(obj) prefix to all generated files in makefiles like follows: $(obj)u-boot.bin: $(obj)u-boot Here, $(obj) is empty for in-tree build, whereas it points to the output directory for out-of-tree build. And our old build system changes the current working directory with "make -C " syntax when descending into the sub-directories. On the other hand, Kbuild uses a different idea to handle out-of-tree build and directory descending. The build process of Kbuild always occurs under the output tree. When "O=dir/to/store/output/files" is given, the build system changes the current working directory to that directory and restarts the make. Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=" syntax for descending into sub-directories. (We can write it like "make $(obj)=" with a shorthand.) This means the current working directory is always the top of the output directory. Signed-off-by: Masahiro Yamada Tested-by: Gerhard Sittig --- arch/arm/cpu/arm1136/config.mk | 2 +- arch/arm/cpu/arm926ejs/config.mk | 2 +- arch/arm/cpu/arm926ejs/davinci/config.mk | 2 +- arch/arm/cpu/armv7/am33xx/config.mk | 2 +- arch/arm/cpu/armv7/config.mk | 2 +- arch/arm/cpu/armv7/omap3/config.mk | 2 +- arch/arm/cpu/armv7/omap4/config.mk | 2 +- arch/arm/cpu/armv7/omap5/config.mk | 2 +- arch/arm/cpu/armv7/socfpga/config.mk | 2 +- arch/blackfin/config.mk | 10 +++++----- arch/blackfin/cpu/Makefile | 8 ++++---- arch/mips/cpu/mips32/config.mk | 2 +- arch/mips/cpu/mips64/config.mk | 2 +- arch/mips/cpu/xburst/config.mk | 2 +- arch/nds32/config.mk | 2 +- arch/powerpc/lib/Makefile | 4 ++-- arch/sandbox/cpu/Makefile | 4 ++-- arch/sparc/config.mk | 3 ++- arch/x86/lib/Makefile | 2 +- 19 files changed, 29 insertions(+), 28 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm1136/config.mk b/arch/arm/cpu/arm1136/config.mk index f74228c..ab1fc4a 100644 --- a/arch/arm/cpu/arm1136/config.mk +++ b/arch/arm/cpu/arm1136/config.mk @@ -14,6 +14,6 @@ ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/SPL endif else -ALL-y += $(obj)u-boot.imx +ALL-y += u-boot.imx endif endif diff --git a/arch/arm/cpu/arm926ejs/config.mk b/arch/arm/cpu/arm926ejs/config.mk index 4d9895f..f27ca15 100644 --- a/arch/arm/cpu/arm926ejs/config.mk +++ b/arch/arm/cpu/arm926ejs/config.mk @@ -13,6 +13,6 @@ ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/SPL endif else -ALL-y += $(obj)u-boot.imx +ALL-y += u-boot.imx endif endif diff --git a/arch/arm/cpu/arm926ejs/davinci/config.mk b/arch/arm/cpu/arm926ejs/davinci/config.mk index d5c978b..69e9d5a 100644 --- a/arch/arm/cpu/arm926ejs/davinci/config.mk +++ b/arch/arm/cpu/arm926ejs/davinci/config.mk @@ -4,5 +4,5 @@ # SPDX-License-Identifier: GPL-2.0+ # ifndef CONFIG_SPL_BUILD -ALL-$(CONFIG_SPL_FRAMEWORK) += $(obj)u-boot.ais +ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.ais endif diff --git a/arch/arm/cpu/armv7/am33xx/config.mk b/arch/arm/cpu/armv7/am33xx/config.mk index 8e3668f..1c06fb4 100644 --- a/arch/arm/cpu/armv7/am33xx/config.mk +++ b/arch/arm/cpu/armv7/am33xx/config.mk @@ -7,5 +7,5 @@ ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/MLO ALL-$(CONFIG_SPL_SPI_SUPPORT) += $(OBJTREE)/MLO.byteswap else -ALL-y += $(obj)u-boot.img +ALL-y += u-boot.img endif diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk index 38b7c40..d01f3d9 100644 --- a/arch/arm/cpu/armv7/config.mk +++ b/arch/arm/cpu/armv7/config.mk @@ -20,6 +20,6 @@ ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/SPL endif else -ALL-y += $(obj)u-boot.imx +ALL-y += u-boot.imx endif endif diff --git a/arch/arm/cpu/armv7/omap3/config.mk b/arch/arm/cpu/armv7/omap3/config.mk index 1d6a57c..2a3d1c5 100644 --- a/arch/arm/cpu/armv7/omap3/config.mk +++ b/arch/arm/cpu/armv7/omap3/config.mk @@ -11,5 +11,5 @@ ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/MLO else -ALL-y += $(obj)u-boot.img +ALL-y += u-boot.img endif diff --git a/arch/arm/cpu/armv7/omap4/config.mk b/arch/arm/cpu/armv7/omap4/config.mk index 1d6a57c..2a3d1c5 100644 --- a/arch/arm/cpu/armv7/omap4/config.mk +++ b/arch/arm/cpu/armv7/omap4/config.mk @@ -11,5 +11,5 @@ ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/MLO else -ALL-y += $(obj)u-boot.img +ALL-y += u-boot.img endif diff --git a/arch/arm/cpu/armv7/omap5/config.mk b/arch/arm/cpu/armv7/omap5/config.mk index 2673af9..261b272 100644 --- a/arch/arm/cpu/armv7/omap5/config.mk +++ b/arch/arm/cpu/armv7/omap5/config.mk @@ -9,5 +9,5 @@ ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/MLO else -ALL-y += $(obj)u-boot.img +ALL-y += u-boot.img endif diff --git a/arch/arm/cpu/armv7/socfpga/config.mk b/arch/arm/cpu/armv7/socfpga/config.mk index d33ab7d..3d18491 100644 --- a/arch/arm/cpu/armv7/socfpga/config.mk +++ b/arch/arm/cpu/armv7/socfpga/config.mk @@ -4,5 +4,5 @@ # SPDX-License-Identifier: GPL-2.0+ # ifndef CONFIG_SPL_BUILD -ALL-y += $(obj)u-boot.img +ALL-y += u-boot.img endif diff --git a/arch/blackfin/config.mk b/arch/blackfin/config.mk index 73fa798..c752025 100644 --- a/arch/blackfin/config.mk +++ b/arch/blackfin/config.mk @@ -12,7 +12,7 @@ CONFIG_STANDALONE_LOAD_ADDR ?= 0x1000 -m elf32bfin ifeq ($(CONFIG_BFIN_CPU),) CONFIG_BFIN_CPU := \ $(shell awk '$$2 == "CONFIG_BFIN_CPU" { print $$3 }' \ - $(src)include/configs/$(BOARD).h) + $(srctree)/include/configs/$(BOARD).h) else CONFIG_BFIN_CPU := $(strip $(CONFIG_BFIN_CPU:"%"=%)) endif @@ -28,10 +28,10 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections PLATFORM_RELFLAGS += -mcpu=$(CONFIG_BFIN_CPU) ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS) -ALL-y += $(obj)u-boot.ldr +ALL-y += u-boot.ldr endif ifeq ($(CONFIG_ENV_IS_EMBEDDED_IN_LDR),y) -CREATE_LDR_ENV = $(obj)tools/envcrc --binary > $(obj)env-ldr.o +CREATE_LDR_ENV = tools/envcrc --binary > env-ldr.o HOSTCFLAGS_NOPED_ADSP := \ $(shell $(CPP) -dD - -mcpu=$(CONFIG_BFIN_CPU) .*\' ; then \ echo "$< contains external references!" 1>&2 ; \ @@ -35,7 +35,7 @@ ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS) fi endif -$(obj)init.lds: init.lds.S +$(obj)/init.lds: $(src)/init.lds.S $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P $^ -o $@ -$(obj)init.elf: $(obj)init.lds $(obj)init.o $(obj)initcode.o +$(obj)/init.elf: $(obj)/init.lds $(obj)/init.o $(obj)/initcode.o $(LD) $(LDFLAGS) -T $^ -o $@ diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk index 067f871..7ee7faa 100644 --- a/arch/mips/cpu/mips32/config.mk +++ b/arch/mips/cpu/mips32/config.mk @@ -21,4 +21,4 @@ else PLATFORM_LDFLAGS += -m elf32ltsmip endif -CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T mips.lds +CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T $(srctree)/$(src)/mips.lds diff --git a/arch/mips/cpu/mips64/config.mk b/arch/mips/cpu/mips64/config.mk index d1a8b2c..02113a1 100644 --- a/arch/mips/cpu/mips64/config.mk +++ b/arch/mips/cpu/mips64/config.mk @@ -21,4 +21,4 @@ else PLATFORM_LDFLAGS += -m elf64ltsmip endif -CONFIG_STANDALONE_LOAD_ADDR ?= 0xffffffff80200000 -T mips64.lds +CONFIG_STANDALONE_LOAD_ADDR ?= 0xffffffff80200000 -T $(srctree)/$(src)/mips64.lds diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk index d81da21..00b0fd9 100644 --- a/arch/mips/cpu/xburst/config.mk +++ b/arch/mips/cpu/xburst/config.mk @@ -12,4 +12,4 @@ else PLATFORM_LDFLAGS += -m elf32ltsmip endif -CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T mips.lds +CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T $(srctree)/$(src)/mips.lds diff --git a/arch/nds32/config.mk b/arch/nds32/config.mk index e93e3a8..550f8a4 100644 --- a/arch/nds32/config.mk +++ b/arch/nds32/config.mk @@ -10,7 +10,7 @@ CROSS_COMPILE ?= nds32le-linux- -CONFIG_STANDALONE_LOAD_ADDR = 0x300000 -T nds32.lds +CONFIG_STANDALONE_LOAD_ADDR = 0x300000 -T $(srctree)/$(src)/nds32.lds PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -mrelax PLATFORM_RELFLAGS += -gdwarf-2 diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index a706d3c..ac780d4 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -54,11 +54,11 @@ ifndef CONFIG_SPL_BUILD # Workaround for local bus unaligned access problems # on MPC512x and MPC5200 ifdef CONFIG_MPC512X -$(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy +$(obj)/ppcstring.o: AFLAGS += -Dmemcpy=__memcpy obj-y += memcpy_mpc5200.o endif ifdef CONFIG_MPC5200 -$(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy +$(obj)/ppcstring.o: AFLAGS += -Dmemcpy=__memcpy obj-y += memcpy_mpc5200.o endif endif diff --git a/arch/sandbox/cpu/Makefile b/arch/sandbox/cpu/Makefile index b564294..c5f5426 100644 --- a/arch/sandbox/cpu/Makefile +++ b/arch/sandbox/cpu/Makefile @@ -10,7 +10,7 @@ obj-y := cpu.o os.o start.o state.o # os.c is build in the system environment, so needs standard includes -$(obj)os.o: CFLAGS := $(filter-out -nostdinc,\ +$(obj)/os.o: CFLAGS := $(filter-out -nostdinc,\ $(patsubst -I%,-idirafter%,$(CFLAGS))) -$(obj).depend.os: CPPFLAGS := $(filter-out -nostdinc,\ +$(obj)/.depend.os: CPPFLAGS := $(filter-out -nostdinc,\ $(patsubst -I%,-idirafter%,$(CPPFLAGS))) diff --git a/arch/sparc/config.mk b/arch/sparc/config.mk index e94e7cb..9bb3724 100644 --- a/arch/sparc/config.mk +++ b/arch/sparc/config.mk @@ -7,6 +7,7 @@ CROSS_COMPILE ?= sparc-elf- -CONFIG_STANDALONE_LOAD_ADDR ?= 0x00000000 -L $(gcclibdir) -T sparc.lds +CONFIG_STANDALONE_LOAD_ADDR ?= 0x00000000 -L $(gcclibdir) \ + -T $(srctree)/$(src)/sparc.lds PLATFORM_CPPFLAGS += -DCONFIG_SPARC -D__sparc__ diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 638f790..a35d062 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -23,5 +23,5 @@ obj-$(CONFIG_CMD_ZBOOT) += zimage.o LIBGCC := $(notdir $(NORMAL_LIBGCC)) extra-y := $(LIBGCC) -$(obj)$(LIBGCC): $(NORMAL_LIBGCC) +$(obj)/$(LIBGCC): $(NORMAL_LIBGCC) $(OBJCOPY) $< $@ --prefix-symbols=__normal_ -- cgit v1.1 From 7c8278a866122ef6c1201b94cd602f98cc649a2f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 4 Feb 2014 17:24:25 +0900 Subject: kbuild: add dummy obj-y to create built-in.o We are going to switch over to Kbuild in upcoming commits. Each makefile must have non-empty obj- or obj-y to generate built-in.o on Kbuild. Signed-off-by: Masahiro Yamada --- arch/arm/cpu/armv7/tegra114/Makefile | 3 ++- arch/arm/cpu/armv7/tegra30/Makefile | 3 ++- arch/nds32/cpu/n1213/Makefile | 3 +++ 3 files changed, 7 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/tegra114/Makefile b/arch/arm/cpu/armv7/tegra114/Makefile index 886b509..77e2319 100644 --- a/arch/arm/cpu/armv7/tegra114/Makefile +++ b/arch/arm/cpu/armv7/tegra114/Makefile @@ -17,4 +17,5 @@ # along with this program. If not, see . # -obj- := +# necessary to create built-in.o +obj- := __dummy__.o diff --git a/arch/arm/cpu/armv7/tegra30/Makefile b/arch/arm/cpu/armv7/tegra30/Makefile index 518d6d1..413eba1 100644 --- a/arch/arm/cpu/armv7/tegra30/Makefile +++ b/arch/arm/cpu/armv7/tegra30/Makefile @@ -17,4 +17,5 @@ # along with this program. If not, see . # -obj- := +# necessary to create built-in.o +obj- := __dummy__.o diff --git a/arch/nds32/cpu/n1213/Makefile b/arch/nds32/cpu/n1213/Makefile index bb3550e..206d304 100644 --- a/arch/nds32/cpu/n1213/Makefile +++ b/arch/nds32/cpu/n1213/Makefile @@ -9,4 +9,7 @@ # SPDX-License-Identifier: GPL-2.0+ # +# necessary to create built-in.o +obj- := __dummy__.o + extra-y = start.o -- cgit v1.1 From 6825a95b0ba72c4e5667d02d8b31986e2e9abd5a Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 4 Feb 2014 17:24:28 +0900 Subject: kbuild: use Linux Kernel build scripts Now we are ready to switch over to real Kbuild. This commit disables temporary scripts: scripts/{Makefile.build.tmp, Makefile.host.tmp} and enables real Kbuild scripts: scripts/{Makefile.build,Makefile.host,Makefile.lib}. This switch is triggered by the line in scripts/Kbuild.include -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj We need to adjust some build scripts for U-Boot. But smaller amount of modification is preferable. Additionally, we need to fix compiler flags which are locally added or removed. In Kbuild, it is not allowed to change CFLAGS locally. Instead, ccflags-y, asflags-y, cppflags-y, CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o are prepared for that purpose. Signed-off-by: Masahiro Yamada Tested-by: Gerhard Sittig --- arch/arm/imx-common/Makefile | 2 +- arch/blackfin/cpu/Makefile | 5 ++--- arch/blackfin/lib/Makefile | 5 ++++- arch/m68k/cpu/mcf5227x/Makefile | 2 +- arch/m68k/cpu/mcf523x/Makefile | 2 +- arch/m68k/cpu/mcf52x2/Makefile | 2 +- arch/m68k/cpu/mcf532x/Makefile | 2 +- arch/m68k/cpu/mcf5445x/Makefile | 2 +- arch/m68k/cpu/mcf547x_8x/Makefile | 2 +- arch/powerpc/cpu/mpc8xx/Makefile | 2 +- arch/powerpc/lib/Makefile | 4 ++-- arch/sandbox/cpu/Makefile | 11 +++++++---- 12 files changed, 23 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile index ee5c872..9dda59d 100644 --- a/arch/arm/imx-common/Makefile +++ b/arch/arm/imx-common/Makefile @@ -25,7 +25,7 @@ obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o $(OBJTREE)/$(patsubst "%",%,$(CONFIG_IMX_CONFIG)).cfgtmp: $(OBJTREE)/%.cfgtmp : $(SRCTREE)/% mkdir -p $(dir $@) - $(CC) -E -x c $< $(CPPFLAGS) -o $@ + $(CPP) $(cpp_flags) -x c -o $@ $< $(OBJTREE)/u-boot.imx: $(OBJTREE)/u-boot.bin $(OBJTREE)/$(patsubst "%",%,$(CONFIG_IMX_CONFIG)).cfgtmp $(OBJTREE)/tools/mkimage -n $(filter-out %.bin,$^) -T imximage \ diff --git a/arch/blackfin/cpu/Makefile b/arch/blackfin/cpu/Makefile index 369dc74..dd4d2d1 100644 --- a/arch/blackfin/cpu/Makefile +++ b/arch/blackfin/cpu/Makefile @@ -25,7 +25,7 @@ extra-y += check_initcode # make sure our initcode (which goes into LDR) does not # have relocs or external references -$(obj)/initcode.o: CFLAGS += -fno-function-sections -fno-data-sections +CFLAGS_REMOVE_initcode.o := -ffunction-sections -fdata-sections READINIT = env LC_ALL=C $(CROSS_COMPILE)readelf -s $< $(obj)/check_initcode: $(obj)/initcode.o ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS) @@ -35,7 +35,6 @@ ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS) fi endif -$(obj)/init.lds: $(src)/init.lds.S - $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P $^ -o $@ +CPPFLAGS_init.lds := -ansi $(obj)/init.elf: $(obj)/init.lds $(obj)/init.o $(obj)/initcode.o $(LD) $(LDFLAGS) -T $^ -o $@ diff --git a/arch/blackfin/lib/Makefile b/arch/blackfin/lib/Makefile index a5c552f..4ba7bf6 100644 --- a/arch/blackfin/lib/Makefile +++ b/arch/blackfin/lib/Makefile @@ -9,7 +9,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -CFLAGS += -DBFIN_BOARD_NAME='"$(BOARD)"' +# Unnecessary. +# Use CONFIG_SYS_BOARD instead of BFIN_BOARD_NAME +# and delete this. +ccflags-y += -DBFIN_BOARD_NAME='"$(BOARD)"' obj-y += ins.o obj-y += memcmp.o diff --git a/arch/m68k/cpu/mcf5227x/Makefile b/arch/m68k/cpu/mcf5227x/Makefile index a47fd56..e0c5db6 100644 --- a/arch/m68k/cpu/mcf5227x/Makefile +++ b/arch/m68k/cpu/mcf5227x/Makefile @@ -5,7 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -# CFLAGS += -DET_DEBUG +# ccflags-y += -DET_DEBUG extra-y = start.o obj-y = cpu.o speed.o cpu_init.o interrupts.o diff --git a/arch/m68k/cpu/mcf523x/Makefile b/arch/m68k/cpu/mcf523x/Makefile index a47fd56..e0c5db6 100644 --- a/arch/m68k/cpu/mcf523x/Makefile +++ b/arch/m68k/cpu/mcf523x/Makefile @@ -5,7 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -# CFLAGS += -DET_DEBUG +# ccflags-y += -DET_DEBUG extra-y = start.o obj-y = cpu.o speed.o cpu_init.o interrupts.o diff --git a/arch/m68k/cpu/mcf52x2/Makefile b/arch/m68k/cpu/mcf52x2/Makefile index d9bf900..b92fd86 100644 --- a/arch/m68k/cpu/mcf52x2/Makefile +++ b/arch/m68k/cpu/mcf52x2/Makefile @@ -5,7 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -# CFLAGS += -DET_DEBUG +# ccflags-y += -DET_DEBUG extra-y = start.o obj-y = interrupts.o cpu.o speed.o cpu_init.o diff --git a/arch/m68k/cpu/mcf532x/Makefile b/arch/m68k/cpu/mcf532x/Makefile index 97aa3f1..9c53c50 100644 --- a/arch/m68k/cpu/mcf532x/Makefile +++ b/arch/m68k/cpu/mcf532x/Makefile @@ -5,7 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -# CFLAGS += -DET_DEBUG +# ccflags-y += -DET_DEBUG extra-y := start.o obj-y = cpu.o speed.o cpu_init.o interrupts.o diff --git a/arch/m68k/cpu/mcf5445x/Makefile b/arch/m68k/cpu/mcf5445x/Makefile index b506719..9be91ed 100644 --- a/arch/m68k/cpu/mcf5445x/Makefile +++ b/arch/m68k/cpu/mcf5445x/Makefile @@ -5,7 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -# CFLAGS += -DET_DEBUG +# ccflags-y += -DET_DEBUG extra-y = start.o obj-y = cpu.o speed.o cpu_init.o interrupts.o pci.o diff --git a/arch/m68k/cpu/mcf547x_8x/Makefile b/arch/m68k/cpu/mcf547x_8x/Makefile index 0fa50bf..4f82099 100644 --- a/arch/m68k/cpu/mcf547x_8x/Makefile +++ b/arch/m68k/cpu/mcf547x_8x/Makefile @@ -5,7 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -# CFLAGS += -DET_DEBUG +# ccflags-y += -DET_DEBUG extra-y = start.o obj-y = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile index d40bdab..f83fd5e 100644 --- a/arch/powerpc/cpu/mpc8xx/Makefile +++ b/arch/powerpc/cpu/mpc8xx/Makefile @@ -5,7 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -# CFLAGS += -DET_DEBUG +# ccflags-y += -DET_DEBUG extra-y += start.o extra-y += traps.o diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index ac780d4..e6d8be5 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -54,11 +54,11 @@ ifndef CONFIG_SPL_BUILD # Workaround for local bus unaligned access problems # on MPC512x and MPC5200 ifdef CONFIG_MPC512X -$(obj)/ppcstring.o: AFLAGS += -Dmemcpy=__memcpy +AFLAGS_ppcstring.o += -Dmemcpy=__memcpy obj-y += memcpy_mpc5200.o endif ifdef CONFIG_MPC5200 -$(obj)/ppcstring.o: AFLAGS += -Dmemcpy=__memcpy +AFLAGS_ppcstring.o += -Dmemcpy=__memcpy obj-y += memcpy_mpc5200.o endif endif diff --git a/arch/sandbox/cpu/Makefile b/arch/sandbox/cpu/Makefile index c5f5426..63deded 100644 --- a/arch/sandbox/cpu/Makefile +++ b/arch/sandbox/cpu/Makefile @@ -10,7 +10,10 @@ obj-y := cpu.o os.o start.o state.o # os.c is build in the system environment, so needs standard includes -$(obj)/os.o: CFLAGS := $(filter-out -nostdinc,\ - $(patsubst -I%,-idirafter%,$(CFLAGS))) -$(obj)/.depend.os: CPPFLAGS := $(filter-out -nostdinc,\ - $(patsubst -I%,-idirafter%,$(CPPFLAGS))) +# CFLAGS_REMOVE_os.o cannot be used to drop header include path +quiet_cmd_cc_os.o = CC $(quiet_modtag) $@ +cmd_cc_os.o = $(CC) $(filter-out -nostdinc, \ + $(patsubst -I%,-idirafter%,$(c_flags))) -c -o $@ $< + +$(obj)/os.o: $(src)/os.c FORCE + $(call if_changed_dep,cc_os.o) -- cgit v1.1 From efcf861931f987d82b11caed75b8c2ad9d709274 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 4 Feb 2014 17:24:40 +0900 Subject: kbuild: use scripts/Makefile.clean This commit refactors cleaning targets such as clean, clobber, mrpropper, distclean with scripts/Makefile.clean. By using scripts/Makefile.clean, we can recursively descend into subdirectories and delete generated files there. We do not need add a big list of generated files to the "clean" target. Signed-off-by: Masahiro Yamada --- arch/blackfin/cpu/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/blackfin/cpu/Makefile b/arch/blackfin/cpu/Makefile index dd4d2d1..426292f 100644 --- a/arch/blackfin/cpu/Makefile +++ b/arch/blackfin/cpu/Makefile @@ -22,6 +22,7 @@ obj-y += reset.o obj-y += traps.o extra-y += check_initcode +clean-files := init.lds # make sure our initcode (which goes into LDR) does not # have relocs or external references -- cgit v1.1 From 6ab6b2afa091dbceb37719b8a81637a00834be19 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 5 Feb 2014 11:28:25 +0900 Subject: dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada --- arch/arm/lib/board.c | 2 +- arch/microblaze/lib/board.c | 2 +- arch/x86/lib/init_helpers.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index b770e25..38b9c7d 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -280,7 +280,7 @@ void board_init_f(ulong bootflag) gd->mon_len = _bss_end_ofs; #ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ - gd->fdt_blob = _binary_dt_dtb_start; + gd->fdt_blob = __dtb_db_begin; #elif defined CONFIG_OF_SEPARATE /* FDT is at end of image */ gd->fdt_blob = (void *)(_end_ofs + _TEXT_BASE); diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index 59956a8..fafeeae 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -87,7 +87,7 @@ void board_init_f(ulong not_used) #ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ - gd->fdt_blob = _binary_dt_dtb_start; + gd->fdt_blob = __dtb_dt_begin; #elif defined CONFIG_OF_SEPARATE /* FDT is at end of image */ gd->fdt_blob = (void *)__end; diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 582c0ff..b5d937f 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -92,7 +92,7 @@ int find_fdt(void) { #ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ - gd->fdt_blob = _binary_dt_dtb_start; + gd->fdt_blob = __dtb_dt_begin; #elif defined CONFIG_OF_SEPARATE /* FDT is at end of image */ gd->fdt_blob = (ulong *)&_end; -- cgit v1.1 From 5ab502cb8900aee483dfba28700640672e0b060e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 5 Feb 2014 11:28:26 +0900 Subject: dts: move device tree sources to arch/$(ARCH)/dts/ Unlike Linux Kernel, U-Boot historically had *.dts files under board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/. I think arch/$(ARCH)/dts dicretory is a better location to store both *.dts and *.dtsi files. For example, before this commit, board/xilinx/dts directory had both Microblaze dts (microblaze-generic.dts) and ARM dts (zynq-*.dts), which are totally unrelated. This commit moves *.dts to arch/$(ARCH)/dts/ directories, allowing us to describe nicely mutiple DTBs generation in the next commit. Signed-off-by: Masahiro Yamada --- arch/arm/dts/exynos5250-arndale.dts | 39 +++ arch/arm/dts/exynos5250-smdk5250.dts | 151 +++++++++ arch/arm/dts/exynos5250-snow.dts | 187 +++++++++++ arch/arm/dts/exynos5420-smdk5420.dts | 169 ++++++++++ arch/arm/dts/tegra114-dalmore.dts | 71 ++++ arch/arm/dts/tegra20-colibri_t20_iris.dts | 45 +++ arch/arm/dts/tegra20-harmony.dts | 105 ++++++ arch/arm/dts/tegra20-medcom-wide.dts | 77 +++++ arch/arm/dts/tegra20-paz00.dts | 91 ++++++ arch/arm/dts/tegra20-plutux.dts | 45 +++ arch/arm/dts/tegra20-seaboard.dts | 191 +++++++++++ arch/arm/dts/tegra20-tamonten.dtsi | 500 +++++++++++++++++++++++++++++ arch/arm/dts/tegra20-tec.dts | 77 +++++ arch/arm/dts/tegra20-trimslice.dts | 64 ++++ arch/arm/dts/tegra20-ventana.dts | 91 ++++++ arch/arm/dts/tegra20-whistler.dts | 73 +++++ arch/arm/dts/tegra30-beaver.dts | 77 +++++ arch/arm/dts/tegra30-cardhu.dts | 72 +++++ arch/arm/dts/tegra30-tamonten.dtsi | 69 ++++ arch/arm/dts/tegra30-tec-ng.dts | 18 ++ arch/arm/dts/zynq-microzed.dts | 14 + arch/arm/dts/zynq-zc702.dts | 14 + arch/arm/dts/zynq-zc706.dts | 14 + arch/arm/dts/zynq-zc770-xm010.dts | 14 + arch/arm/dts/zynq-zc770-xm012.dts | 14 + arch/arm/dts/zynq-zc770-xm013.dts | 14 + arch/arm/dts/zynq-zed.dts | 14 + arch/microblaze/dts/microblaze-generic.dts | 7 + arch/x86/dts/alex.dts | 24 ++ arch/x86/dts/link.dts | 35 ++ 30 files changed, 2376 insertions(+) create mode 100644 arch/arm/dts/exynos5250-arndale.dts create mode 100644 arch/arm/dts/exynos5250-smdk5250.dts create mode 100644 arch/arm/dts/exynos5250-snow.dts create mode 100644 arch/arm/dts/exynos5420-smdk5420.dts create mode 100644 arch/arm/dts/tegra114-dalmore.dts create mode 100644 arch/arm/dts/tegra20-colibri_t20_iris.dts create mode 100644 arch/arm/dts/tegra20-harmony.dts create mode 100644 arch/arm/dts/tegra20-medcom-wide.dts create mode 100644 arch/arm/dts/tegra20-paz00.dts create mode 100644 arch/arm/dts/tegra20-plutux.dts create mode 100644 arch/arm/dts/tegra20-seaboard.dts create mode 100644 arch/arm/dts/tegra20-tamonten.dtsi create mode 100644 arch/arm/dts/tegra20-tec.dts create mode 100644 arch/arm/dts/tegra20-trimslice.dts create mode 100644 arch/arm/dts/tegra20-ventana.dts create mode 100644 arch/arm/dts/tegra20-whistler.dts create mode 100644 arch/arm/dts/tegra30-beaver.dts create mode 100644 arch/arm/dts/tegra30-cardhu.dts create mode 100644 arch/arm/dts/tegra30-tamonten.dtsi create mode 100644 arch/arm/dts/tegra30-tec-ng.dts create mode 100644 arch/arm/dts/zynq-microzed.dts create mode 100644 arch/arm/dts/zynq-zc702.dts create mode 100644 arch/arm/dts/zynq-zc706.dts create mode 100644 arch/arm/dts/zynq-zc770-xm010.dts create mode 100644 arch/arm/dts/zynq-zc770-xm012.dts create mode 100644 arch/arm/dts/zynq-zc770-xm013.dts create mode 100644 arch/arm/dts/zynq-zed.dts create mode 100644 arch/microblaze/dts/microblaze-generic.dts create mode 100644 arch/x86/dts/alex.dts create mode 100644 arch/x86/dts/link.dts (limited to 'arch') diff --git a/arch/arm/dts/exynos5250-arndale.dts b/arch/arm/dts/exynos5250-arndale.dts new file mode 100644 index 0000000..202f2ea --- /dev/null +++ b/arch/arm/dts/exynos5250-arndale.dts @@ -0,0 +1,39 @@ +/* + * SAMSUNG Arndale board device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * SPDX-License-Identifier: GPL-2.0+ +*/ + +/dts-v1/; +#include "exynos5250.dtsi" + +/ { + model = "SAMSUNG Arndale board based on EXYNOS5250"; + compatible = "samsung,arndale", "samsung,exynos5250"; + + aliases { + serial0 = "/serial@12C20000"; + console = "/serial@12C20000"; + }; + + mmc@12200000 { + samsung,bus-width = <8>; + samsung,timing = <1 3 3>; + }; + + mmc@12210000 { + status = "disabled"; + }; + + mmc@12220000 { + samsung,bus-width = <4>; + samsung,timing = <1 2 3>; + }; + + mmc@12230000 { + status = "disabled"; + }; +}; diff --git a/arch/arm/dts/exynos5250-smdk5250.dts b/arch/arm/dts/exynos5250-smdk5250.dts new file mode 100644 index 0000000..9020382 --- /dev/null +++ b/arch/arm/dts/exynos5250-smdk5250.dts @@ -0,0 +1,151 @@ +/* + * SAMSUNG SMDK5250 board device tree source + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +/include/ "exynos5250.dtsi" + +/ { + model = "SAMSUNG SMDK5250 board based on EXYNOS5250"; + compatible = "samsung,smdk5250", "samsung,exynos5250"; + + aliases { + i2c0 = "/i2c@12c60000"; + i2c1 = "/i2c@12c70000"; + i2c2 = "/i2c@12c80000"; + i2c3 = "/i2c@12c90000"; + i2c4 = "/i2c@12ca0000"; + i2c5 = "/i2c@12cb0000"; + i2c6 = "/i2c@12cc0000"; + i2c7 = "/i2c@12cd0000"; + spi0 = "/spi@12d20000"; + spi1 = "/spi@12d30000"; + spi2 = "/spi@12d40000"; + spi3 = "/spi@131a0000"; + spi4 = "/spi@131b0000"; + mmc0 = "/mmc@12200000"; + mmc1 = "/mmc@12210000"; + mmc2 = "/mmc@12220000"; + mmc3 = "/mmc@12230000"; + serial0 = "/serial@12C30000"; + console = "/serial@12C30000"; + i2s = "/sound@3830000"; + }; + + sromc@12250000 { + bank = <1>; + srom-timing = <1 9 12 1 6 1 1>; + width = <2>; + lan@5000000 { + compatible = "smsc,lan9215", "smsc,lan"; + reg = <0x5000000 0x100>; + phy-mode = "mii"; + }; + }; + + sound@3830000 { + samsung,codec-type = "wm8994"; + }; + + sound@12d60000 { + status = "disabled"; + }; + + i2c@12c70000 { + soundcodec@1a { + reg = <0x1a>; + compatible = "wolfson,wm8994-codec"; + }; + }; + + i2c@12c60000 { + pmic@9 { + reg = <0x9>; + compatible = "maxim,max77686_pmic"; + }; + }; + + tmu@10060000 { + samsung,min-temp = <25>; + samsung,max-temp = <125>; + samsung,start-warning = <95>; + samsung,start-tripping = <105>; + samsung,hw-tripping = <110>; + samsung,efuse-min-value = <40>; + samsung,efuse-value = <55>; + samsung,efuse-max-value = <100>; + samsung,slope = <274761730>; + samsung,dc-value = <25>; + }; + + fimd@14400000 { + samsung,vl-freq = <60>; + samsung,vl-col = <2560>; + samsung,vl-row = <1600>; + samsung,vl-width = <2560>; + samsung,vl-height = <1600>; + + samsung,vl-clkp; + samsung,vl-dp; + samsung,vl-bpix = <4>; + + samsung,vl-hspw = <32>; + samsung,vl-hbpd = <80>; + samsung,vl-hfpd = <48>; + samsung,vl-vspw = <6>; + samsung,vl-vbpd = <37>; + samsung,vl-vfpd = <3>; + samsung,vl-cmd-allow-len = <0xf>; + + samsung,winid = <3>; + samsung,interface-mode = <1>; + samsung,dp-enabled = <1>; + samsung,dual-lcd-enabled = <0>; + }; + + dp@145b0000 { + samsung,lt-status = <0>; + + samsung,master-mode = <0>; + samsung,bist-mode = <0>; + samsung,bist-pattern = <0>; + samsung,h-sync-polarity = <0>; + samsung,v-sync-polarity = <0>; + samsung,interlaced = <0>; + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + }; + + mmc@12200000 { + samsung,bus-width = <8>; + samsung,timing = <1 3 3>; + samsung,removable = <0>; + }; + + mmc@12210000 { + status = "disabled"; + }; + + mmc@12220000 { + samsung,bus-width = <4>; + samsung,timing = <1 2 3>; + samsung,removable = <1>; + }; + + mmc@12230000 { + status = "disabled"; + }; + + ehci@12110000 { + samsung,vbus-gpio = <&gpio 0x316 0>; /* X26 */ + }; +}; diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts new file mode 100644 index 0000000..9b48a0c --- /dev/null +++ b/arch/arm/dts/exynos5250-snow.dts @@ -0,0 +1,187 @@ +/* + * SAMSUNG Snow board device tree source + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +/include/ "exynos5250.dtsi" + +/ { + model = "Google Snow"; + compatible = "google,snow", "samsung,exynos5250"; + + aliases { + i2c0 = "/i2c@12c60000"; + i2c1 = "/i2c@12c70000"; + i2c2 = "/i2c@12c80000"; + i2c3 = "/i2c@12c90000"; + i2c4 = "/i2c@12ca0000"; + i2c5 = "/i2c@12cb0000"; + i2c6 = "/i2c@12cc0000"; + i2c7 = "/i2c@12cd0000"; + spi0 = "/spi@12d20000"; + spi1 = "/spi@12d30000"; + spi2 = "/spi@12d40000"; + spi3 = "/spi@131a0000"; + spi4 = "/spi@131b0000"; + mmc0 = "/mmc@12200000"; + mmc1 = "/mmc@12210000"; + mmc2 = "/mmc@12220000"; + mmc3 = "/mmc@12230000"; + serial0 = "/serial@12C30000"; + console = "/serial@12C30000"; + i2s = "/sound@3830000"; + }; + + i2c4: i2c@12ca0000 { + cros-ec@1e { + reg = <0x1e>; + compatible = "google,cros-ec"; + i2c-max-frequency = <100000>; + ec-interrupt = <&gpio 782 1>; + }; + + power-regulator@48 { + compatible = "ti,tps65090"; + reg = <0x48>; + }; + }; + + spi@131b0000 { + spi-max-frequency = <1000000>; + spi-deactivate-delay = <100>; + cros-ec@0 { + reg = <0>; + compatible = "google,cros-ec"; + spi-max-frequency = <5000000>; + ec-interrupt = <&gpio 782 1>; + optimise-flash-write; + status = "disabled"; + }; + }; + + sound@3830000 { + samsung,codec-type = "max98095"; + codec-enable-gpio = <&gpio 0xb7 0>; + }; + + sound@12d60000 { + status = "disabled"; + }; + + i2c@12cd0000 { + soundcodec@22 { + reg = <0x22>; + compatible = "maxim,max98095-codec"; + }; + }; + + i2c@12c60000 { + pmic@9 { + reg = <0x9>; + compatible = "maxim,max77686_pmic"; + }; + }; + + mmc@12200000 { + samsung,bus-width = <8>; + samsung,timing = <1 3 3>; + samsung,removable = <0>; + }; + + mmc@12210000 { + status = "disabled"; + }; + + mmc@12220000 { + samsung,bus-width = <4>; + samsung,timing = <1 2 3>; + samsung,removable = <1>; + }; + + mmc@12230000 { + status = "disabled"; + }; + + ehci@12110000 { + samsung,vbus-gpio = <&gpio 0x309 0>; /* X11 */ + }; + + xhci@12000000 { + samsung,vbus-gpio = <&gpio 0x317 0>; /* X27 */ + }; + + tmu@10060000 { + samsung,min-temp = <25>; + samsung,max-temp = <125>; + samsung,start-warning = <95>; + samsung,start-tripping = <105>; + samsung,hw-tripping = <110>; + samsung,efuse-min-value = <40>; + samsung,efuse-value = <55>; + samsung,efuse-max-value = <100>; + samsung,slope = <274761730>; + samsung,dc-value = <25>; + }; + + cros-ec-keyb { + compatible = "google,cros-ec-keyb"; + google,key-rows = <8>; + google,key-columns = <13>; + google,repeat-delay-ms = <240>; + google,repeat-rate-ms = <30>; + google,ghost-filter; + /* + * Keymap entries take the form of 0xRRCCKKKK where + * RR=Row CC=Column KKKK=Key Code + * The values below are for a US keyboard layout and + * are taken from the Linux driver. Note that the + * 102ND key is not used for US keyboards. + */ + linux,keymap = < + /* CAPSLCK F1 B F10 */ + 0x0001003a 0x0002003b 0x00030030 0x00040044 + /* N = R_ALT ESC */ + 0x00060031 0x0008000d 0x000a0064 0x01010001 + /* F4 G F7 H */ + 0x0102003e 0x01030022 0x01040041 0x01060023 + /* ' F9 BKSPACE L_CTRL */ + 0x01080028 0x01090043 0x010b000e 0x0200001d + /* TAB F3 T F6 */ + 0x0201000f 0x0202003d 0x02030014 0x02040040 + /* ] Y 102ND [ */ + 0x0205001b 0x02060015 0x02070056 0x0208001a + /* F8 GRAVE F2 5 */ + 0x02090042 0x03010029 0x0302003c 0x03030006 + /* F5 6 - \ */ + 0x0304003f 0x03060007 0x0308000c 0x030b002b + /* R_CTRL A D F */ + 0x04000061 0x0401001e 0x04020020 0x04030021 + /* S K J ; */ + 0x0404001f 0x04050025 0x04060024 0x04080027 + /* L ENTER Z C */ + 0x04090026 0x040b001c 0x0501002c 0x0502002e + /* V X , M */ + 0x0503002f 0x0504002d 0x05050033 0x05060032 + /* L_SHIFT / . SPACE */ + 0x0507002a 0x05080035 0x05090034 0x050B0039 + /* 1 3 4 2 */ + 0x06010002 0x06020004 0x06030005 0x06040003 + /* 8 7 0 9 */ + 0x06050009 0x06060008 0x0608000b 0x0609000a + /* L_ALT DOWN RIGHT Q */ + 0x060a0038 0x060b006c 0x060c006a 0x07010010 + /* E R W I */ + 0x07020012 0x07030013 0x07040011 0x07050017 + /* U R_SHIFT P O */ + 0x07060016 0x07070036 0x07080019 0x07090018 + /* UP LEFT */ + 0x070b0067 0x070c0069>; + }; +}; diff --git a/arch/arm/dts/exynos5420-smdk5420.dts b/arch/arm/dts/exynos5420-smdk5420.dts new file mode 100644 index 0000000..d739763 --- /dev/null +++ b/arch/arm/dts/exynos5420-smdk5420.dts @@ -0,0 +1,169 @@ +/* + * SAMSUNG SMDK5420 board device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +/include/ "exynos5420.dtsi" + +/ { + model = "SAMSUNG SMDK5420 board based on EXYNOS5420"; + compatible = "samsung,smdk5420", "samsung,exynos5"; + + config { + hwid = "smdk5420 TEST A-A 9382"; + }; + + aliases { + i2c0 = "/i2c@12c60000"; + i2c1 = "/i2c@12c70000"; + i2c2 = "/i2c@12c80000"; + i2c3 = "/i2c@12c90000"; + i2c4 = "/i2c@12ca0000"; + i2c5 = "/i2c@12cb0000"; + i2c6 = "/i2c@12cc0000"; + i2c7 = "/i2c@12cd0000"; + i2c8 = "/i2c@12e00000"; + i2c9 = "/i2c@12e10000"; + i2c10 = "/i2c@12e20000"; + spi0 = "/spi@12d20000"; + spi1 = "/spi@12d30000"; + spi2 = "/spi@12d40000"; + spi3 = "/spi@131a0000"; + spi4 = "/spi@131b0000"; + mmc0 = "/mmc@12200000"; + mmc1 = "/mmc@12210000"; + mmc2 = "/mmc@12220000"; + xhci0 = "/xhci@12000000"; + xhci1 = "/xhci@12400000"; + serial0 = "/serial@12C30000"; + console = "/serial@12C30000"; + }; + + tmu@10060000 { + samsung,min-temp = <25>; + samsung,max-temp = <125>; + samsung,start-warning = <95>; + samsung,start-tripping = <105>; + samsung,hw-tripping = <110>; + samsung,efuse-min-value = <40>; + samsung,efuse-value = <55>; + samsung,efuse-max-value = <100>; + samsung,slope = <274761730>; + samsung,dc-value = <25>; + }; + + /* s2mps11 is on i2c bus 4 */ + i2c@12ca0000 { + #address-cells = <1>; + #size-cells = <0>; + pmic@66 { + reg = <0x66>; + compatible = "samsung,s2mps11-pmic"; + }; + }; + + spi@12d20000 { /* spi0 */ + spi-max-frequency = <50000000>; + firmware_storage_spi: flash@0 { + reg = <0>; + }; + }; + + fimd@14400000 { + samsung,vl-freq = <60>; + samsung,vl-col = <2560>; + samsung,vl-row = <1600>; + samsung,vl-width = <2560>; + samsung,vl-height = <1600>; + + samsung,vl-clkp; + samsung,vl-dp; + samsung,vl-bpix = <4>; + + samsung,vl-hspw = <32>; + samsung,vl-hbpd = <80>; + samsung,vl-hfpd = <48>; + samsung,vl-vspw = <6>; + samsung,vl-vbpd = <37>; + samsung,vl-vfpd = <3>; + samsung,vl-cmd-allow-len = <0xf>; + + samsung,winid = <3>; + samsung,interface-mode = <1>; + samsung,dp-enabled = <1>; + samsung,dual-lcd-enabled = <0>; + }; + + sound@3830000 { + samsung,codec-type = "wm8994"; + }; + + i2c@12c70000 { + soundcodec@1a { + reg = <0x1a>; + compatible = "wolfson,wm8994-codec"; + }; + }; + + mmc@12200000 { + samsung,bus-width = <8>; + samsung,timing = <1 3 3>; + samsung,removable = <0>; + samsung,pre-init; + }; + + mmc@12210000 { + status = "disabled"; + }; + + mmc@12220000 { + samsung,bus-width = <4>; + samsung,timing = <1 2 3>; + samsung,removable = <1>; + }; + + mmc@12230000 { + status = "disabled"; + }; + + fimd@14400000 { + /* sysmmu is not used in U-Boot */ + samsung,disable-sysmmu; + }; + + dp@145b0000 { + samsung,lt-status = <0>; + + samsung,master-mode = <0>; + samsung,bist-mode = <0>; + samsung,bist-pattern = <0>; + samsung,h-sync-polarity = <0>; + samsung,v-sync-polarity = <0>; + samsung,interlaced = <0>; + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + }; + + dmc { + mem-type = "ddr3"; + }; + + xhci1: xhci@12400000 { + compatible = "samsung,exynos5250-xhci"; + reg = <0x12400000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + + phy { + compatible = "samsung,exynos5250-usb3-phy"; + reg = <0x12500000 0x100>; + }; + }; +}; diff --git a/arch/arm/dts/tegra114-dalmore.dts b/arch/arm/dts/tegra114-dalmore.dts new file mode 100644 index 0000000..435c01e --- /dev/null +++ b/arch/arm/dts/tegra114-dalmore.dts @@ -0,0 +1,71 @@ +/dts-v1/; + +#include "tegra114.dtsi" + +/ { + model = "NVIDIA Dalmore"; + compatible = "nvidia,dalmore", "nvidia,tegra114"; + + aliases { + i2c0 = "/i2c@7000d000"; + i2c1 = "/i2c@7000c000"; + i2c2 = "/i2c@7000c400"; + i2c3 = "/i2c@7000c500"; + i2c4 = "/i2c@7000c700"; + sdhci0 = "/sdhci@78000600"; + sdhci1 = "/sdhci@78000400"; + usb0 = "/usb@7d008000"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c400 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c500 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c700 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + }; + + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + }; + + sdhci@78000400 { + cd-gpios = <&gpio 170 1>; /* gpio PV2 */ + bus-width = <4>; + status = "okay"; + }; + + sdhci@78000600 { + bus-width = <8>; + status = "okay"; + }; + + usb@7d008000 { + /* SPDIF_IN: USB_VBUS_EN1 */ + nvidia,vbus-gpio = <&gpio 86 0>; + status = "okay"; + }; +}; diff --git a/arch/arm/dts/tegra20-colibri_t20_iris.dts b/arch/arm/dts/tegra20-colibri_t20_iris.dts new file mode 100644 index 0000000..c0e54af --- /dev/null +++ b/arch/arm/dts/tegra20-colibri_t20_iris.dts @@ -0,0 +1,45 @@ +/dts-v1/; + +#include "tegra20.dtsi" + +/ { + model = "Toradex Colibri T20"; + compatible = "toradex,t20", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + usb1 = "/usb@c5000000"; + usb2 = "/usb@c5004000"; + sdhci0 = "/sdhci@c8000600"; + }; + + usb@c5000000 { + dr_mode = "otg"; + }; + + usb@c5004000 { + nvidia,phy-reset-gpio = <&gpio 169 0>; /* PV1 */ + nvidia,vbus-gpio = <&gpio 217 0>; /* PBB1 */ + }; + + usb@c5008000 { + nvidia,vbus-gpio = <&gpio 178 1>; /* PW2 low-active */ + }; + + nand-controller@70008000 { + nvidia,wp-gpios = <&gpio 144 0>; /* PS0 */ + nvidia,width = <8>; + nvidia,timing = <15 100 25 80 25 10 15 10 100>; + + nand@0 { + reg = <0>; + compatible = "nand-flash"; + }; + }; + + sdhci@c8000600 { + status = "okay"; + cd-gpios = <&gpio 23 1>; /* gpio PC7 */ + bus-width = <4>; + }; +}; diff --git a/arch/arm/dts/tegra20-harmony.dts b/arch/arm/dts/tegra20-harmony.dts new file mode 100644 index 0000000..b115f87 --- /dev/null +++ b/arch/arm/dts/tegra20-harmony.dts @@ -0,0 +1,105 @@ +/dts-v1/; + +#include "tegra20.dtsi" + +/ { + model = "NVIDIA Tegra20 Harmony evaluation board"; + compatible = "nvidia,harmony", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + usb1 = "/usb@c5004000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000200"; + }; + + memory { + reg = <0x00000000 0x40000000>; + }; + + host1x { + status = "okay"; + dc@54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + + serial@70006300 { + clock-frequency = < 216000000 >; + }; + + nand-controller@70008000 { + nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */ + nvidia,width = <8>; + nvidia,timing = <26 100 20 80 20 10 12 10 70>; + nand@0 { + reg = <0>; + compatible = "hynix,hy27uf4g2b", "nand-flash"; + }; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + status = "disabled"; + }; + + usb@c5000000 { + status = "disabled"; + }; + + usb@c5004000 { + nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + }; + + sdhci@c8000200 { + status = "okay"; + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 155 0>; /* gpio PT3 */ + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + cd-gpios = <&gpio 58 1>; /* gpio PH2 */ + wp-gpios = <&gpio 59 0>; /* gpio PH3 */ + power-gpios = <&gpio 70 0>; /* gpio PI6 */ + bus-width = <8>; + }; + + lcd_panel: panel { + clock = <42430000>; + xres = <1024>; + yres = <600>; + left-margin = <138>; + right-margin = <34>; + hsync-len = <136>; + lower-margin = <4>; + upper-margin = <21>; + vsync-len = <4>; + hsync-active-high; + vsyncx-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 0 0>; + nvidia,backlight-enable-gpios = <&gpio 13 0>; /* PB5 */ + nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */ + nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */ + nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */ + nvidia,panel-timings = <0 0 200 0 0>; + }; +}; diff --git a/arch/arm/dts/tegra20-medcom-wide.dts b/arch/arm/dts/tegra20-medcom-wide.dts new file mode 100644 index 0000000..a9a07f9 --- /dev/null +++ b/arch/arm/dts/tegra20-medcom-wide.dts @@ -0,0 +1,77 @@ +/dts-v1/; + +#include "tegra20-tamonten.dtsi" + +/ { + model = "Avionic Design Medcom-Wide"; + compatible = "ad,medcom-wide", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + }; + + memory { + reg = <0x00000000 0x20000000>; + }; + + host1x { + status = "okay"; + + dc@54200000 { + status = "okay"; + + rgb { + nvidia,panel = <&lcd_panel>; + status = "okay"; + }; + }; + }; + + serial@70006300 { + clock-frequency = <216000000>; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + status = "disabled"; + }; + + usb@c5000000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; + + lcd_panel: panel { + clock = <61715000>; + xres = <1366>; + yres = <768>; + left-margin = <2>; + right-margin = <47>; + hsync-len = <136>; + lower-margin = <21>; + upper-margin = <11>; + vsync-len = <4>; + + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 0 500000>; + nvidia,backlight-enable-gpios = <&gpio 13 0>; /* PB5 */ + nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */ + nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */ + nvidia,panel-timings = <0 0 0 0>; + }; +}; diff --git a/arch/arm/dts/tegra20-paz00.dts b/arch/arm/dts/tegra20-paz00.dts new file mode 100644 index 0000000..780203c --- /dev/null +++ b/arch/arm/dts/tegra20-paz00.dts @@ -0,0 +1,91 @@ +/dts-v1/; + +#include "tegra20.dtsi" + +/ { + model = "Toshiba AC100 / Dynabook AZ"; + compatible = "compal,paz00", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000000"; + }; + + memory { + reg = <0x00000000 0x20000000>; + }; + + host1x { + status = "okay"; + dc@54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + + serial@70006000 { + clock-frequency = < 216000000 >; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + status = "disabled"; + }; + + usb@c5000000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; + + sdhci@c8000000 { + status = "okay"; + cd-gpios = <&gpio 173 1>; /* gpio PV5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 169 0>; /* gpio PV1 */ + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; + + lcd_panel: panel { + /* PAZ00 has 1024x600 */ + clock = <54030000>; + xres = <1024>; + yres = <600>; + right-margin = <160>; + left-margin = <24>; + hsync-len = <136>; + upper-margin = <3>; + lower-margin = <61>; + vsync-len = <6>; + hsync-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 0 0>; + nvidia,backlight-enable-gpios = <&gpio 164 0>; /* PU4 */ + nvidia,lvds-shutdown-gpios = <&gpio 102 0>; /* PM6 */ + nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */ + nvidia,panel-vdd-gpios = <&gpio 4 0>; /* PA4 */ + nvidia,panel-timings = <400 4 203 17 15>; + }; +}; diff --git a/arch/arm/dts/tegra20-plutux.dts b/arch/arm/dts/tegra20-plutux.dts new file mode 100644 index 0000000..20016f2 --- /dev/null +++ b/arch/arm/dts/tegra20-plutux.dts @@ -0,0 +1,45 @@ +/dts-v1/; + +#include "tegra20-tamonten.dtsi" + +/ { + model = "Avionic Design Plutux"; + compatible = "ad,plutux", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + }; + + memory { + reg = <0x00000000 0x20000000>; + }; + + serial@70006300 { + clock-frequency = <216000000>; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + status = "disabled"; + }; + + usb@c5000000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; +}; diff --git a/arch/arm/dts/tegra20-seaboard.dts b/arch/arm/dts/tegra20-seaboard.dts new file mode 100644 index 0000000..c0e2e1e --- /dev/null +++ b/arch/arm/dts/tegra20-seaboard.dts @@ -0,0 +1,191 @@ +/dts-v1/; + +#include "tegra20.dtsi" + +/ { + model = "NVIDIA Seaboard"; + compatible = "nvidia,seaboard", "nvidia,tegra20"; + + chosen { + bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait"; + }; + + aliases { + /* This defines the order of our ports */ + usb0 = "/usb@c5008000"; + usb1 = "/usb@c5000000"; + i2c0 = "/i2c@7000d000"; + i2c1 = "/i2c@7000c000"; + i2c2 = "/i2c@7000c400"; + i2c3 = "/i2c@7000c500"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000400"; + }; + + memory { + device_type = "memory"; + reg = < 0x00000000 0x40000000 >; + }; + + host1x { + status = "okay"; + dc@54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + + /* This is not used in U-Boot, but is expected to be in kernel .dts */ + i2c@7000d000 { + clock-frequency = <100000>; + pmic@34 { + compatible = "ti,tps6586x"; + reg = <0x34>; + + clk_32k: clock { + compatible = "fixed-clock"; + /* + * leave out for now due to CPP: + * #clock-cells = <0>; + */ + clock-frequency = <32768>; + }; + }; + }; + + serial@70006300 { + clock-frequency = < 216000000 >; + }; + + nand-controller@70008000 { + nvidia,wp-gpios = <&gpio 59 0>; /* PH3 */ + nvidia,width = <8>; + nvidia,timing = <26 100 20 80 20 10 12 10 70>; + nand@0 { + reg = <0>; + compatible = "hynix,hy27uf4g2b", "nand-flash"; + }; + }; + + i2c@7000c000 { + clock-frequency = <100000>; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + clock-frequency = <100000>; + }; + + kbc@7000e200 { + linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c + 0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006 + 0x03010005 0x03020013 0x03030012 0x03040021 0x03050020 + 0x0306002d 0x04000008 0x04010007 0x04020014 0x04030023 + 0x04040022 0x0405002f 0x0406002e 0x04070039 0x0500000a + 0x05010009 0x05020016 0x05030015 0x05040024 0x05050031 + 0x05060030 0x0507002b 0x0600000c 0x0601000b 0x06020018 + 0x06030017 0x06040026 0x06050025 0x06060033 0x06070032 + 0x0701000d 0x0702001b 0x0703001c 0x0707008b 0x08040036 + 0x0805002a 0x09050061 0x0907001d 0x0b00001a 0x0b010019 + 0x0b020028 0x0b030027 0x0b040035 0x0b050034 0x0c000044 + 0x0c010043 0x0c02000e 0x0c030004 0x0c040003 0x0c050067 + 0x0c0600d2 0x0c070077 0x0d00006e 0x0d01006f 0x0d030068 + 0x0d04006d 0x0d05006a 0x0d06006c 0x0d070069 0x0e000057 + 0x0e010058 0x0e020042 0x0e030010 0x0e04003e 0x0e05003d + 0x0e060002 0x0e070041 0x0f000001 0x0f010029 0x0f02003f + 0x0f03000f 0x0f04003b 0x0f05003c 0x0f06003a 0x0f070040 + 0x14000047 0x15000049 0x15010048 0x1502004b 0x1504004f + 0x16010062 0x1602004d 0x1603004c 0x16040051 0x16050050 + 0x16070052 0x1b010037 0x1b03004a 0x1b04004e 0x1b050053 + 0x1c050073 0x1d030066 0x1d04006b 0x1d0500e0 0x1d060072 + 0x1d0700e1 0x1e000045 0x1e010046 0x1e020071 + 0x1f04008a>; + linux,fn-keymap = <0x05040002>; + }; + + emc@7000f400 { + emc-table@190000 { + reg = < 190000 >; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = < 190000 >; + nvidia,emc-registers = < 0x0000000c 0x00000026 + 0x00000009 0x00000003 0x00000004 0x00000004 + 0x00000002 0x0000000c 0x00000003 0x00000003 + 0x00000002 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x0000059f + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000003 0x00000001 0x0000000b 0x000000c8 + 0x00000003 0x00000007 0x00000004 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xa06204ae + 0x007dc010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + emc-table@380000 { + reg = < 380000 >; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = < 380000 >; + nvidia,emc-registers = < 0x00000017 0x0000004b + 0x00000012 0x00000006 0x00000004 0x00000005 + 0x00000003 0x0000000c 0x00000006 0x00000006 + 0x00000003 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x00000b5f + 0x00000000 0x00000003 0x00000003 0x00000006 + 0x00000006 0x00000001 0x00000011 0x000000c8 + 0x00000003 0x0000000e 0x00000007 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xe044048b + 0x007d8010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + }; + + usb@c5000000 { + nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ + dr_mode = "otg"; + }; + + usb@c5004000 { + status = "disabled"; + }; + + sdhci@c8000400 { + status = "okay"; + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 70 0>; /* gpio PI6 */ + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; + + lcd_panel: panel { + /* Seaboard has 1366x768 */ + clock = <70600000>; + xres = <1366>; + yres = <768>; + left-margin = <58>; + right-margin = <58>; + hsync-len = <58>; + lower-margin = <4>; + upper-margin = <4>; + vsync-len = <4>; + hsync-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 2 0>; + nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */ + nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */ + nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */ + nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */ + nvidia,panel-timings = <400 4 203 17 15>; + }; +}; diff --git a/arch/arm/dts/tegra20-tamonten.dtsi b/arch/arm/dts/tegra20-tamonten.dtsi new file mode 100644 index 0000000..f379622 --- /dev/null +++ b/arch/arm/dts/tegra20-tamonten.dtsi @@ -0,0 +1,500 @@ +#include "tegra20.dtsi" + +/ { + model = "Avionic Design Tamonten SOM"; + compatible = "ad,tamonten", "nvidia,tegra20"; + + memory { + reg = <0x00000000 0x20000000>; + }; + + host1x { + hdmi { + vdd-supply = <&hdmi_vdd_reg>; + pll-supply = <&hdmi_pll_reg>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + }; + }; + + pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ata { + nvidia,pins = "ata"; + nvidia,function = "ide"; + }; + atb { + nvidia,pins = "atb", "gma", "gme"; + nvidia,function = "sdio4"; + }; + atc { + nvidia,pins = "atc"; + nvidia,function = "nand"; + }; + atd { + nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu", + "spia", "spib", "spic"; + nvidia,function = "gmi"; + }; + cdev1 { + nvidia,pins = "cdev1"; + nvidia,function = "plla_out"; + }; + cdev2 { + nvidia,pins = "cdev2"; + nvidia,function = "pllp_out4"; + }; + crtp { + nvidia,pins = "crtp"; + nvidia,function = "crt"; + }; + csus { + nvidia,pins = "csus"; + nvidia,function = "vi_sensor_clk"; + }; + dap1 { + nvidia,pins = "dap1"; + nvidia,function = "dap1"; + }; + dap2 { + nvidia,pins = "dap2"; + nvidia,function = "dap2"; + }; + dap3 { + nvidia,pins = "dap3"; + nvidia,function = "dap3"; + }; + dap4 { + nvidia,pins = "dap4"; + nvidia,function = "dap4"; + }; + dta { + nvidia,pins = "dta", "dtd"; + nvidia,function = "sdio2"; + }; + dtb { + nvidia,pins = "dtb", "dtc", "dte"; + nvidia,function = "rsvd1"; + }; + dtf { + nvidia,pins = "dtf"; + nvidia,function = "i2c3"; + }; + gmc { + nvidia,pins = "gmc"; + nvidia,function = "uartd"; + }; + gpu7 { + nvidia,pins = "gpu7"; + nvidia,function = "rtck"; + }; + gpv { + nvidia,pins = "gpv", "slxa", "slxk"; + nvidia,function = "pcie"; + }; + hdint { + nvidia,pins = "hdint"; + nvidia,function = "hdmi"; + }; + i2cp { + nvidia,pins = "i2cp"; + nvidia,function = "i2cp"; + }; + irrx { + nvidia,pins = "irrx", "irtx"; + nvidia,function = "uarta"; + }; + kbca { + nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", + "kbce", "kbcf"; + nvidia,function = "kbc"; + }; + lcsn { + nvidia,pins = "lcsn", "ld0", "ld1", "ld2", + "ld3", "ld4", "ld5", "ld6", "ld7", + "ld8", "ld9", "ld10", "ld11", "ld12", + "ld13", "ld14", "ld15", "ld16", "ld17", + "ldc", "ldi", "lhp0", "lhp1", "lhp2", + "lhs", "lm0", "lm1", "lpp", "lpw0", + "lpw1", "lpw2", "lsc0", "lsc1", "lsck", + "lsda", "lsdi", "lspi", "lvp0", "lvp1", + "lvs"; + nvidia,function = "displaya"; + }; + owc { + nvidia,pins = "owc", "spdi", "spdo", "uac"; + nvidia,function = "rsvd2"; + }; + pmc { + nvidia,pins = "pmc"; + nvidia,function = "pwr_on"; + }; + rm { + nvidia,pins = "rm"; + nvidia,function = "i2c1"; + }; + sdb { + nvidia,pins = "sdb", "sdc", "sdd"; + nvidia,function = "pwm"; + }; + sdio1 { + nvidia,pins = "sdio1"; + nvidia,function = "sdio1"; + }; + slxc { + nvidia,pins = "slxc", "slxd"; + nvidia,function = "spdif"; + }; + spid { + nvidia,pins = "spid", "spie", "spif"; + nvidia,function = "spi1"; + }; + spig { + nvidia,pins = "spig", "spih"; + nvidia,function = "spi2_alt"; + }; + uaa { + nvidia,pins = "uaa", "uab", "uda"; + nvidia,function = "ulpi"; + }; + uad { + nvidia,pins = "uad"; + nvidia,function = "irda"; + }; + uca { + nvidia,pins = "uca", "ucb"; + nvidia,function = "uartc"; + }; + conf_ata { + nvidia,pins = "ata", "atb", "atc", "atd", "ate", + "cdev1", "cdev2", "dap1", "dtb", "gma", + "gmb", "gmc", "gmd", "gme", "gpu7", + "gpv", "i2cp", "pta", "rm", "slxa", + "slxk", "spia", "spib", "uac"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + conf_ck32 { + nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", + "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; + nvidia,pull = <0>; + }; + conf_csus { + nvidia,pins = "csus", "spid", "spif"; + nvidia,pull = <1>; + nvidia,tristate = <1>; + }; + conf_crtp { + nvidia,pins = "crtp", "dap2", "dap3", "dap4", + "dtc", "dte", "dtf", "gpu", "sdio1", + "slxc", "slxd", "spdi", "spdo", "spig", + "uda"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + conf_ddc { + nvidia,pins = "ddc", "dta", "dtd", "kbca", + "kbcb", "kbcc", "kbcd", "kbce", "kbcf", + "sdc"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + }; + conf_hdint { + nvidia,pins = "hdint", "lcsn", "ldc", "lm1", + "lpw1", "lsc1", "lsck", "lsda", "lsdi", + "lvp0", "owc", "sdb"; + nvidia,tristate = <1>; + }; + conf_irrx { + nvidia,pins = "irrx", "irtx", "sdd", "spic", + "spie", "spih", "uaa", "uab", "uad", + "uca", "ucb"; + nvidia,pull = <2>; + nvidia,tristate = <1>; + }; + conf_lc { + nvidia,pins = "lc", "ls"; + nvidia,pull = <2>; + }; + conf_ld0 { + nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", + "ld5", "ld6", "ld7", "ld8", "ld9", + "ld10", "ld11", "ld12", "ld13", "ld14", + "ld15", "ld16", "ld17", "ldi", "lhp0", + "lhp1", "lhp2", "lhs", "lm0", "lpp", + "lpw0", "lpw2", "lsc0", "lspi", "lvp1", + "lvs", "pmc"; + nvidia,tristate = <0>; + }; + conf_ld17_0 { + nvidia,pins = "ld17_0", "ld19_18", "ld21_20", + "ld23_22"; + nvidia,pull = <1>; + }; + }; + + state_i2cmux_ddc: pinmux_i2cmux_ddc { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "i2c2"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "rsvd4"; + }; + }; + + state_i2cmux_pta: pinmux_i2cmux_pta { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "rsvd4"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "i2c2"; + }; + }; + + state_i2cmux_idle: pinmux_i2cmux_idle { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "rsvd4"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "rsvd4"; + }; + }; + }; + + i2s@70002800 { + status = "okay"; + }; + + serial@70006300 { + status = "okay"; + }; + + nand-controller@70008000 { + nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */ + nvidia,width = <8>; + nvidia,timing = <26 100 20 80 20 10 12 10 70>; + + nand@0 { + reg = <0>; + compatible = "hynix,hy27uf4g2b", "nand-flash"; + }; + }; + + i2c@7000c000 { + clock-frequency = <400000>; + status = "okay"; + }; + + i2c@7000c400 { + clock-frequency = <100000>; + status = "okay"; + }; + + i2cmux { + compatible = "i2c-mux-pinctrl"; + #address-cells = <1>; + #size-cells = <0>; + + i2c-parent = <&{/i2c@7000c400}>; + + pinctrl-names = "ddc", "pta", "idle"; + pinctrl-0 = <&state_i2cmux_ddc>; + pinctrl-1 = <&state_i2cmux_pta>; + pinctrl-2 = <&state_i2cmux_idle>; + + hdmi_ddc: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + i2c@7000d000 { + clock-frequency = <400000>; + status = "okay"; + + pmic: tps6586x@34 { + compatible = "ti,tps6586x"; + reg = <0x34>; + interrupts = <0 86 0x4>; + + ti,system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + sys-supply = <&vdd_5v0_reg>; + vin-sm0-supply = <&sys_reg>; + vin-sm1-supply = <&sys_reg>; + vin-sm2-supply = <&sys_reg>; + vinldo01-supply = <&sm2_reg>; + vinldo23-supply = <&sm2_reg>; + vinldo4-supply = <&sm2_reg>; + vinldo678-supply = <&sm2_reg>; + vinldo9-supply = <&sm2_reg>; + + regulators { + sys_reg: sys { + regulator-name = "vdd_sys"; + regulator-always-on; + }; + + sm0 { + regulator-name = "vdd_sys_sm0,vdd_core"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + sm1 { + regulator-name = "vdd_sys_sm1,vdd_cpu"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + sm2_reg: sm2 { + regulator-name = "vdd_sys_sm2,vin_ldo*"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + regulator-always-on; + }; + + ldo0 { + regulator-name = "vdd_ldo0,vddio_pex_clk"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo1 { + regulator-name = "vdd_ldo1,avdd_pll*"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo2 { + regulator-name = "vdd_ldo2,vdd_rtc"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo3 { + regulator-name = "vdd_ldo3,avdd_usb*"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo4 { + regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo5 { + regulator-name = "vdd_ldo5,vcore_mmc"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + ldo6 { + regulator-name = "vdd_ldo6,avdd_vdac"; + /* + * According to the Tegra 2 Automotive + * DataSheet, a typical value for this + * would be 2.8V, but the PMIC only + * supports 2.85V. + */ + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + hdmi_vdd_reg: ldo7 { + regulator-name = "vdd_ldo7,avdd_hdmi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + hdmi_pll_reg: ldo8 { + regulator-name = "vdd_ldo8,avdd_hdmi_pll"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo9 { + regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam"; + /* + * According to the Tegra 2 Automotive + * DataSheet, a typical value for this + * would be 2.8V, but the PMIC only + * supports 2.85V. + */ + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + }; + + ldo_rtc { + regulator-name = "vdd_rtc_out"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; + + temperature-sensor@4c { + compatible = "onnn,nct1008"; + reg = <0x4c>; + }; + }; + + pmc { + nvidia,invert-interrupt; + }; + + usb@c5008000 { + status = "okay"; + }; + + sdhci@c8000600 { + cd-gpios = <&gpio 58 1>; /* gpio PH2 */ + wp-gpios = <&gpio 59 0>; /* gpio PH3 */ + bus-width = <4>; + status = "okay"; + }; + + regulators { + compatible = "simple-bus"; + + #address-cells = <1>; + #size-cells = <0>; + + vdd_5v0_reg: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "vdd_5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + }; +}; diff --git a/arch/arm/dts/tegra20-tec.dts b/arch/arm/dts/tegra20-tec.dts new file mode 100644 index 0000000..4c1b08d --- /dev/null +++ b/arch/arm/dts/tegra20-tec.dts @@ -0,0 +1,77 @@ +/dts-v1/; + +#include "tegra20-tamonten.dtsi" + +/ { + model = "Avionic Design Tamonten Evaluation Carrier"; + compatible = "ad,tec", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + }; + + memory { + reg = <0x00000000 0x20000000>; + }; + + host1x { + status = "okay"; + + dc@54200000 { + status = "okay"; + + rgb { + nvidia,panel = <&lcd_panel>; + status = "okay"; + }; + }; + }; + + serial@70006300 { + clock-frequency = <216000000>; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + status = "disabled"; + }; + + usb@c5000000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; + + lcd_panel: panel { + clock = <33260000>; + xres = <800>; + yres = <480>; + left-margin = <120>; + right-margin = <120>; + hsync-len = <16>; + lower-margin = <15>; + upper-margin = <15>; + vsync-len = <15>; + + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 0 500000>; + nvidia,backlight-enable-gpios = <&gpio 13 0>; /* PB5 */ + nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */ + nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */ + nvidia,panel-timings = <0 0 0 0>; + }; +}; diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts new file mode 100644 index 0000000..ee31476 --- /dev/null +++ b/arch/arm/dts/tegra20-trimslice.dts @@ -0,0 +1,64 @@ +/dts-v1/; + +#include "tegra20.dtsi" + +/ { + model = "Compulab TrimSlice board"; + compatible = "compulab,trimslice", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + usb1 = "/usb@c5000000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000000"; + }; + + memory { + reg = <0x00000000 0x40000000>; + }; + + serial@70006000 { + clock-frequency = <216000000>; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + spi@7000c380 { + status = "okay"; + spi-max-frequency = <25000000>; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + status = "disabled"; + }; + + usb@c5000000 { + nvidia,vbus-gpio = <&gpio 170 0>; /* PV2 */ + }; + + usb@c5004000 { + status = "disabled"; + }; + + sdhci@c8000000 { + status = "okay"; + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + cd-gpios = <&gpio 121 1>; /* gpio PP1 */ + wp-gpios = <&gpio 122 0>; /* gpio PP2 */ + bus-width = <4>; + }; +}; diff --git a/arch/arm/dts/tegra20-ventana.dts b/arch/arm/dts/tegra20-ventana.dts new file mode 100644 index 0000000..1a526ba --- /dev/null +++ b/arch/arm/dts/tegra20-ventana.dts @@ -0,0 +1,91 @@ +/dts-v1/; + +#include "tegra20.dtsi" + +/ { + model = "NVIDIA Tegra20 Ventana evaluation board"; + compatible = "nvidia,ventana", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000400"; + }; + + memory { + reg = <0x00000000 0x40000000>; + }; + + host1x { + status = "okay"; + dc@54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + + serial@70006300 { + clock-frequency = < 216000000 >; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + status = "disabled"; + }; + + usb@c5000000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; + + sdhci@c8000400 { + status = "okay"; + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 70 0>; /* gpio PI6 */ + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; + + lcd_panel: panel { + clock = <72072000>; + xres = <1366>; + yres = <768>; + left-margin = <58>; + right-margin = <58>; + hsync-len = <58>; + lower-margin = <4>; + upper-margin = <4>; + vsync-len = <4>; + hsync-active-high; + vsync-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 2 0>; + nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */ + nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */ + nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */ + nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */ + nvidia,panel-timings = <0 0 200 0 0>; + }; +}; diff --git a/arch/arm/dts/tegra20-whistler.dts b/arch/arm/dts/tegra20-whistler.dts new file mode 100644 index 0000000..eb92264 --- /dev/null +++ b/arch/arm/dts/tegra20-whistler.dts @@ -0,0 +1,73 @@ +/dts-v1/; + +#include "tegra20.dtsi" + +/ { + model = "NVIDIA Tegra20 Whistler evaluation board"; + compatible = "nvidia,whistler", "nvidia,tegra20"; + + aliases { + i2c0 = "/i2c@7000d000"; + usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000400"; + }; + + memory { + device_type = "memory"; + reg = < 0x00000000 0x20000000 >; + }; + + serial@70006000 { + clock-frequency = < 216000000 >; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + clock-frequency = <100000>; + + pmic@3c { + compatible = "maxim,max8907b"; + reg = <0x3c>; + + clk_32k: clock { + compatible = "fixed-clock"; + /* + * leave out for now due to CPP: + * #clock-cells = <0>; + */ + clock-frequency = <32768>; + }; + }; + }; + + usb@c5000000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; + + sdhci@c8000400 { + status = "okay"; + wp-gpios = <&gpio 173 0>; /* gpio PV5 */ + bus-width = <8>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; +}; diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts new file mode 100644 index 0000000..a7cc93e --- /dev/null +++ b/arch/arm/dts/tegra30-beaver.dts @@ -0,0 +1,77 @@ +/dts-v1/; + +#include "tegra30.dtsi" + +/ { + model = "NVIDIA Beaver"; + compatible = "nvidia,beaver", "nvidia,tegra30"; + + aliases { + i2c0 = "/i2c@7000d000"; + i2c1 = "/i2c@7000c000"; + i2c2 = "/i2c@7000c400"; + i2c3 = "/i2c@7000c500"; + i2c4 = "/i2c@7000c700"; + sdhci0 = "/sdhci@78000600"; + sdhci1 = "/sdhci@78000000"; + usb0 = "/usb@7d008000"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x7ff00000>; + }; + + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c400 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c500 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c700 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <100000>; + }; + + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + spi-flash@1 { + compatible = "winbond,w25q32"; + reg = <1>; + spi-max-frequency = <20000000>; + }; + }; + + sdhci@78000000 { + status = "okay"; + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ + wp-gpios = <&gpio 155 0>; /* gpio PT3 */ + power-gpios = <&gpio 31 0>; /* gpio PD7 */ + bus-width = <4>; + }; + + sdhci@78000600 { + status = "okay"; + bus-width = <8>; + }; + + usb@7d008000 { + nvidia,vbus-gpio = <&gpio 236 0>; /* PDD4 */ + status = "okay"; + }; +}; diff --git a/arch/arm/dts/tegra30-cardhu.dts b/arch/arm/dts/tegra30-cardhu.dts new file mode 100644 index 0000000..ea2cf76 --- /dev/null +++ b/arch/arm/dts/tegra30-cardhu.dts @@ -0,0 +1,72 @@ +/dts-v1/; + +#include "tegra30.dtsi" + +/ { + model = "NVIDIA Cardhu"; + compatible = "nvidia,cardhu", "nvidia,tegra30"; + + aliases { + i2c0 = "/i2c@7000d000"; + i2c1 = "/i2c@7000c000"; + i2c2 = "/i2c@7000c400"; + i2c3 = "/i2c@7000c500"; + i2c4 = "/i2c@7000c700"; + sdhci0 = "/sdhci@78000600"; + sdhci1 = "/sdhci@78000000"; + usb0 = "/usb@7d008000"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c400 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c500 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c700 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <100000>; + }; + + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + }; + + sdhci@78000000 { + status = "okay"; + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ + wp-gpios = <&gpio 155 0>; /* gpio PT3 */ + power-gpios = <&gpio 31 0>; /* gpio PD7 */ + bus-width = <4>; + }; + + sdhci@78000600 { + status = "okay"; + bus-width = <8>; + }; + + usb@7d008000 { + nvidia,vbus-gpio = <&gpio 236 0>; /* PDD4 */ + status = "okay"; + }; +}; diff --git a/arch/arm/dts/tegra30-tamonten.dtsi b/arch/arm/dts/tegra30-tamonten.dtsi new file mode 100644 index 0000000..50d5762 --- /dev/null +++ b/arch/arm/dts/tegra30-tamonten.dtsi @@ -0,0 +1,69 @@ +#include "tegra30.dtsi" + +/ { + model = "Avionic Design Tamonten NG"; + compatible = "ad,tamonten-ng", "nvidia,tegra30"; + + memory { + reg = <0x80000000 0x40000000>; + }; + + aliases { + i2c0 = "/i2c@7000c000"; + i2c1 = "/i2c@7000c700"; + i2c2 = "/i2c@7000c400"; + i2c3 = "/i2c@7000c500"; + i2c4 = "/i2c@7000d000"; + sdhci0 = "/sdhci@78000600"; + sdhci1 = "/sdhci@78000400"; + sdhci2 = "/sdhci@78000000"; + usb0 = "/usb@7d008000"; + }; + + /* GEN1 */ + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* GEN2 */ + i2c@7000c400 { + clock-frequency = <100000>; + }; + + /* CAM */ + i2c@7000c500 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* DDC */ + i2c@7000c700 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* PWR */ + i2c@7000d000 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* SD slot on the base board */ + sdhci@78000400 { + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ + wp-gpios = <&gpio 67 0>; /* gpio PI3 */ + bus-width = <4>; + }; + + /* EMMC on the COM module */ + sdhci@78000600 { + status = "okay"; + bus-width = <8>; + }; + + usb@7d008000 { + status = "okay"; + }; + +}; diff --git a/arch/arm/dts/tegra30-tec-ng.dts b/arch/arm/dts/tegra30-tec-ng.dts new file mode 100644 index 0000000..8a69e81 --- /dev/null +++ b/arch/arm/dts/tegra30-tec-ng.dts @@ -0,0 +1,18 @@ +/dts-v1/; + +#include "tegra30-tamonten.dtsi" + +/ { + model = "Avionic Design Tamonten™ NG Evaluation Carrier"; + compatible = "ad,tec-ng", "nvidia,tegra30"; + + /* GEN2 */ + i2c@7000c400 { + status = "okay"; + }; + + /* SD card slot */ + sdhci@78000400 { + status = "okay"; + }; +}; diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts new file mode 100644 index 0000000..6da71c1 --- /dev/null +++ b/arch/arm/dts/zynq-microzed.dts @@ -0,0 +1,14 @@ +/* + * Xilinx MicroZED board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq MicroZED Board"; + compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000"; +}; diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts new file mode 100644 index 0000000..667dc28 --- /dev/null +++ b/arch/arm/dts/zynq-zc702.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZC702 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC702 Board"; + compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; +}; diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts new file mode 100644 index 0000000..526fc88 --- /dev/null +++ b/arch/arm/dts/zynq-zc706.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZC706 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC706 Board"; + compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; +}; diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts new file mode 100644 index 0000000..8b542a1 --- /dev/null +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZC770 XM010 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC770 XM010 Board"; + compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000"; +}; diff --git a/arch/arm/dts/zynq-zc770-xm012.dts b/arch/arm/dts/zynq-zc770-xm012.dts new file mode 100644 index 0000000..0379a07 --- /dev/null +++ b/arch/arm/dts/zynq-zc770-xm012.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZC770 XM012 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC770 XM012 Board"; + compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; +}; diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts new file mode 100644 index 0000000..a4f9e05 --- /dev/null +++ b/arch/arm/dts/zynq-zc770-xm013.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZC770 XM013 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC770 XM013 Board"; + compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000"; +}; diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts new file mode 100644 index 0000000..91a5deb --- /dev/null +++ b/arch/arm/dts/zynq-zed.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZED board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZED Board"; + compatible = "xlnx,zynq-zed", "xlnx,zynq-7000"; +}; diff --git a/arch/microblaze/dts/microblaze-generic.dts b/arch/microblaze/dts/microblaze-generic.dts new file mode 100644 index 0000000..2033309 --- /dev/null +++ b/arch/microblaze/dts/microblaze-generic.dts @@ -0,0 +1,7 @@ +/dts-v1/; +/ { + #address-cells = <1>; + #size-cells = <1>; + aliases { + } ; +} ; diff --git a/arch/x86/dts/alex.dts b/arch/x86/dts/alex.dts new file mode 100644 index 0000000..2f13544 --- /dev/null +++ b/arch/x86/dts/alex.dts @@ -0,0 +1,24 @@ +/dts-v1/; + +/include/ "coreboot.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + model = "Google Alex"; + compatible = "google,alex", "intel,atom-pineview"; + + config { + silent_console = <0>; + }; + + gpio: gpio {}; + + serial { + reg = <0x3f8 8>; + clock-frequency = <115200>; + }; + + chosen { }; + memory { device_type = "memory"; reg = <0 0>; }; +}; diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts new file mode 100644 index 0000000..4a37dac --- /dev/null +++ b/arch/x86/dts/link.dts @@ -0,0 +1,35 @@ +/dts-v1/; + +/include/ "coreboot.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + model = "Google Link"; + compatible = "google,link", "intel,celeron-ivybridge"; + + config { + silent_console = <0>; + }; + + gpio: gpio {}; + + serial { + reg = <0x3f8 8>; + clock-frequency = <115200>; + }; + + chosen { }; + memory { device_type = "memory"; reg = <0 0>; }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + compatible = "intel,ich9"; + spi-flash@0 { + reg = <0>; + compatible = "winbond,w25q64", "spi-flash"; + memory-map = <0xff800000 0x00800000>; + }; + }; +}; -- cgit v1.1 From 3284c8b8cad9452bf0711f52699bc9a5aeb83319 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 5 Feb 2014 11:28:27 +0900 Subject: dts: generate multiple device tree blobs It is convenient to have all device trees on the same SoC compiled. It allows for later easy repackaging without the need to re-run the make file. - Build device trees with the same SoC under arch/$(ARCH)/dts - Copy the one specified by CONFIG_DEFAULT_DEVICE_TREE or DEVICE_TREE=... to dts/dt.dtb Signed-off-by: Masahiro Yamada --- arch/arm/dts/.gitignore | 1 + arch/arm/dts/Makefile | 37 +++++++++++++++++++++++++++++++++++++ arch/microblaze/dts/.gitignore | 1 + arch/microblaze/dts/Makefile | 11 +++++++++++ arch/x86/dts/.gitignore | 1 + arch/x86/dts/Makefile | 12 ++++++++++++ 6 files changed, 63 insertions(+) create mode 100644 arch/arm/dts/.gitignore create mode 100644 arch/arm/dts/Makefile create mode 100644 arch/microblaze/dts/.gitignore create mode 100644 arch/microblaze/dts/Makefile create mode 100644 arch/x86/dts/.gitignore create mode 100644 arch/x86/dts/Makefile (limited to 'arch') diff --git a/arch/arm/dts/.gitignore b/arch/arm/dts/.gitignore new file mode 100644 index 0000000..b60ed20 --- /dev/null +++ b/arch/arm/dts/.gitignore @@ -0,0 +1 @@ +*.dtb diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile new file mode 100644 index 0000000..2658911 --- /dev/null +++ b/arch/arm/dts/Makefile @@ -0,0 +1,37 @@ +dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ + exynos5250-snow.dtb \ + exynos5250-smdk5250.dtb \ + exynos5420-smdk5420.dtb + +dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ + tegra20-medcom-wide.dtb \ + tegra20-paz00.dtb \ + tegra20-plutux.dtb \ + tegra20-seaboard.dtb \ + tegra20-tec.dtb \ + tegra20-trimslice.dtb \ + tegra20-ventana.dtb \ + tegra20-whistler.dtb \ + tegra20-colibri_t20_iris.dtb \ + tegra30-beaver.dtb \ + tegra30-cardhu.dtb \ + tegra30-tec-ng.dtb \ + tegra114-dalmore.dtb + +dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \ + zynq-zc706.dtb \ + zynq-zed.dtb \ + zynq-microzed.dtb \ + zynq-zc770-xm010.dtb \ + zynq-zc770-xm012.dtb \ + zynq-zc770-xm013.dtb + +targets += $(dtb-y) + +DTC_FLAGS += -R 4 -p 0x1000 + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := *.dtb diff --git a/arch/microblaze/dts/.gitignore b/arch/microblaze/dts/.gitignore new file mode 100644 index 0000000..b60ed20 --- /dev/null +++ b/arch/microblaze/dts/.gitignore @@ -0,0 +1 @@ +*.dtb diff --git a/arch/microblaze/dts/Makefile b/arch/microblaze/dts/Makefile new file mode 100644 index 0000000..6d4a11f --- /dev/null +++ b/arch/microblaze/dts/Makefile @@ -0,0 +1,11 @@ +dtb-y += microblaze-generic.dtb + +targets += $(dtb-y) + +DTC_FLAGS += -R 4 -p 0x1000 + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := *.dtb diff --git a/arch/x86/dts/.gitignore b/arch/x86/dts/.gitignore new file mode 100644 index 0000000..b60ed20 --- /dev/null +++ b/arch/x86/dts/.gitignore @@ -0,0 +1 @@ +*.dtb diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile new file mode 100644 index 0000000..48265ef --- /dev/null +++ b/arch/x86/dts/Makefile @@ -0,0 +1,12 @@ +dtb-y += link.dtb \ + alex.dtb + +targets += $(dtb-y) + +DTC_FLAGS += -R 4 -p 0x1000 + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := *.dtb -- cgit v1.1 From 365475e6d14bc1ea9d218c0fd1fe96878a9db94e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 13 Feb 2014 18:30:26 +0900 Subject: Move #ifdef(CONFIG_DISPLAY_CPUINFO) from caller to callee - When CONFIG_DISPLAY_CPUINFO is not enabled, print_cpuinfo() should be defined as an empty function in a header, include/common.h - Remove #ifdef CONFIG_DISPLAY_CPUINFO .. #endif from caller, common/board_f.c and arch/arm/lib/board.c - Remove redundant prototypes in arch/arm/lib/board.c, arch/arm/include/asm/arch-am33x/sys_proto.h and board/nokia/rx51/rx51.h, keeping the one in include/common.h - Add #ifdef CONFIG_DISPLAY_CPUINFO to the func definition where it is missing Signed-off-by: Masahiro Yamada --- arch/arm/cpu/armv7/omap-common/hwinit-common.c | 3 +++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 4 ---- arch/arm/lib/board.c | 4 ---- 3 files changed, 3 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c index bf29510..ade744e 100644 --- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c @@ -248,6 +248,7 @@ u32 get_device_type(void) (DEVICE_TYPE_MASK)) >> DEVICE_TYPE_SHIFT; } +#if defined(CONFIG_DISPLAY_CPUINFO) /* * Print CPU information */ @@ -258,6 +259,8 @@ int print_cpuinfo(void) return 0; } +#endif + #ifndef CONFIG_SYS_DCACHE_OFF void enable_caches(void) { diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 87b7d36..2e5c356 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -17,10 +17,6 @@ u32 get_cpu_rev(void); u32 get_sysboot_value(void); -#ifdef CONFIG_DISPLAY_CPUINFO -int print_cpuinfo(void); -#endif - extern struct ctrl_stat *cstat; u32 get_device_type(void); void save_omap_boot_params(void); diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 38b9c7d..c320a35 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -197,8 +197,6 @@ static int arm_pci_init(void) */ typedef int (init_fnc_t) (void); -int print_cpuinfo(void); - void __dram_init_banksize(void) { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; @@ -250,9 +248,7 @@ init_fnc_t *init_sequence[] = { serial_init, /* serial communications setup */ console_init_f, /* stage 1 init of console */ display_banner, /* say that we are here */ -#if defined(CONFIG_DISPLAY_CPUINFO) print_cpuinfo, /* display cpu info (and speed) */ -#endif #if defined(CONFIG_DISPLAY_BOARDINFO) checkboard, /* display board info */ #endif -- cgit v1.1 From ca53735a4cd6cc8159e1a9515446e81230dc5b27 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 13 Feb 2014 18:30:27 +0900 Subject: Move CONFIG_DISPLAY_CPUINFO to Makefile If the whole code is surrounded by #ifdef(CONFIG_ ) .. #endif, it should be moved to Makefile. Signed-off-by: Masahiro Yamada --- arch/arm/cpu/arm926ejs/omap/Makefile | 3 ++- arch/arm/cpu/arm926ejs/omap/cpuinfo.c | 4 ++-- arch/arm/cpu/tegra-common/Makefile | 3 ++- arch/arm/cpu/tegra-common/sys_info.c | 2 -- 4 files changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/omap/Makefile b/arch/arm/cpu/arm926ejs/omap/Makefile index bd0a2fb..add9232 100644 --- a/arch/arm/cpu/arm926ejs/omap/Makefile +++ b/arch/arm/cpu/arm926ejs/omap/Makefile @@ -5,5 +5,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y = timer.o cpuinfo.o +obj-y = timer.o +obj-$(CONFIG_DISPLAY_CPUINFO) += cpuinfo.o obj-y += reset.o diff --git a/arch/arm/cpu/arm926ejs/omap/cpuinfo.c b/arch/arm/cpu/arm926ejs/omap/cpuinfo.c index 02332ee..587d99a 100644 --- a/arch/arm/cpu/arm926ejs/omap/cpuinfo.c +++ b/arch/arm/cpu/arm926ejs/omap/cpuinfo.c @@ -13,7 +13,7 @@ #include #include -#if defined(CONFIG_DISPLAY_CPUINFO) && defined(CONFIG_OMAP) +#if defined(CONFIG_OMAP) #define omap_readw(x) *(volatile unsigned short *)(x) #define omap_readl(x) *(volatile unsigned long *)(x) @@ -239,4 +239,4 @@ int print_cpuinfo (void) return 0; } -#endif /* #if defined(CONFIG_DISPLAY_CPUINFO) && defined(CONFIG_OMAP) */ +#endif /* #if defined(CONFIG_OMAP) */ diff --git a/arch/arm/cpu/tegra-common/Makefile b/arch/arm/cpu/tegra-common/Makefile index edfc1a8..34d5734 100644 --- a/arch/arm/cpu/tegra-common/Makefile +++ b/arch/arm/cpu/tegra-common/Makefile @@ -8,4 +8,5 @@ # obj-y += lowlevel_init.o -obj-y += ap.o board.o sys_info.o clock.o cache.o +obj-y += ap.o board.o clock.o cache.o +obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o diff --git a/arch/arm/cpu/tegra-common/sys_info.c b/arch/arm/cpu/tegra-common/sys_info.c index dc8a2e4..de20325 100644 --- a/arch/arm/cpu/tegra-common/sys_info.c +++ b/arch/arm/cpu/tegra-common/sys_info.c @@ -8,7 +8,6 @@ #include #include -#ifdef CONFIG_DISPLAY_CPUINFO void upstring(char *s) { while (*s) { @@ -30,4 +29,3 @@ int print_cpuinfo(void) /* TBD: Add printf of major/minor rev info, stepping, etc. */ return 0; } -#endif /* CONFIG_DISPLAY_CPUINFO */ -- cgit v1.1 From 2aa43f70cf5b15d66db35d3390b9abb9ae8c3b51 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 19 Feb 2014 22:26:43 +0900 Subject: kbuild,tegra124: add dummy obj- for Kbuild In Kbuild, every makefile must have non-empty obj- or obj-y. Otherwise, built-in.o will not be created and the link stage will fail. Signed-off-by: Masahiro Yamada --- arch/arm/cpu/armv7/tegra124/Makefile | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/tegra124/Makefile b/arch/arm/cpu/armv7/tegra124/Makefile index 7f127b1..9478d44 100644 --- a/arch/arm/cpu/armv7/tegra124/Makefile +++ b/arch/arm/cpu/armv7/tegra124/Makefile @@ -4,3 +4,6 @@ # # SPDX-License-Identifier: GPL-2.0+ # + +# necessary to create built-in.o +obj- := __dummy__.o -- cgit v1.1