From 345cd3584cd90288abd4256678fbfa7d2443bd00 Mon Sep 17 00:00:00 2001 From: Marek Vasut <marex@denx.de> Date: Thu, 15 Mar 2012 18:33:23 +0000 Subject: i.MX28: Enable caches by default Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> --- arch/arm/cpu/arm926ejs/mx28/mx28.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c index 9bfd83b..cf6d4e9 100644 --- a/arch/arm/cpu/arm926ejs/mx28/mx28.c +++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c @@ -63,6 +63,16 @@ void reset_cpu(ulong ignored) ; } +void enable_caches(void) +{ +#ifndef CONFIG_SYS_ICACHE_OFF + icache_enable(); +#endif +#ifndef CONFIG_SYS_DCACHE_OFF + dcache_enable(); +#endif +} + int mx28_wait_mask_set(struct mx28_register_32 *reg, uint32_t mask, int timeout) { while (--timeout) { -- cgit v1.1