From 2af3932fca0123939695a316fc62832bacb1d760 Mon Sep 17 00:00:00 2001 From: Filip Drazic Date: Mon, 29 Aug 2016 19:32:56 +0200 Subject: ARM64: zynqmp: DT: Add PM domains for GPU and PCIE Signed-off-by: Filip Drazic Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 6df8ee9..c2eb0c5 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -189,6 +189,16 @@ #power-domain-cells = <0x0>; pd-id = <0x30>; }; + + pd_pcie: pd-pcie { + #power-domain-cells = <0x0>; + pd-id = <0x3b>; + }; + + pd_gpu: pd-gpu { + #power-domain-cells = <0x0>; + pd-id = <0x3a>; + }; }; pmu { @@ -392,6 +402,7 @@ interrupt-parent = <&gic>; interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>; interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; + power-domains = <&pd_gpu>; }; /* ADMA */ @@ -611,6 +622,7 @@ <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, <0x0 0x0 0x0 0x3 &pcie_intc 0x3>, <0x0 0x0 0x0 0x4 &pcie_intc 0x4>; + power-domains = <&pd_pcie>; pcie_intc: legacy-interrupt-controller { interrupt-controller; #address-cells = <0>; -- cgit v1.1