From c978b52410016b0ab5a213f235596340af8d45f7 Mon Sep 17 00:00:00 2001
From: Chris Zankel <chris@zankel.net>
Date: Wed, 10 Aug 2016 18:36:44 +0300
Subject: xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
 arch/xtensa/Makefile | 8 ++++++++
 1 file changed, 8 insertions(+)
 create mode 100644 arch/xtensa/Makefile

(limited to 'arch/xtensa/Makefile')

diff --git a/arch/xtensa/Makefile b/arch/xtensa/Makefile
new file mode 100644
index 0000000..130d76f
--- /dev/null
+++ b/arch/xtensa/Makefile
@@ -0,0 +1,8 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+head-y := arch/xtensa/cpu/start.o
+
+libs-y += arch/xtensa/cpu/
+libs-y += arch/xtensa/lib/
-- 
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