From 4a34e4b86f75547ff2a546f02196cdfb9439eca4 Mon Sep 17 00:00:00 2001 From: Gabriel Huau Date: Sat, 25 Apr 2015 13:16:03 -0700 Subject: x86: baytrail: fix the GPIOBASE address The correct GPIOBASE address on the baytrail is 0x48 Signed-off-by: Gabriel Huau Reviewed-by: Bin Meng Acked-by: Simon Glass --- arch/x86/include/asm/arch-baytrail/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/x86') diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h b/arch/x86/include/asm/arch-baytrail/gpio.h index ab4e059..4e8987c 100644 --- a/arch/x86/include/asm/arch-baytrail/gpio.h +++ b/arch/x86/include/asm/arch-baytrail/gpio.h @@ -8,6 +8,6 @@ #define _X86_ARCH_GPIO_H_ /* Where in config space is the register that points to the GPIO registers? */ -#define PCI_CFG_GPIOBASE 0x44 +#define PCI_CFG_GPIOBASE 0x48 #endif /* _X86_ARCH_GPIO_H_ */ -- cgit v1.1