From 99744b7e342014082609572af01bb6964e0f5a5a Mon Sep 17 00:00:00 2001 From: Phil Edworthy Date: Tue, 15 May 2012 22:15:51 +0000 Subject: sh: Add SH7269 device and RSK2+SH7269 board This is an sh2a device (max 266MHz) with FPU, video display controller (VDC), 8 serial ports, 4 I2C channels, 3 CAN ports, SD and on-chip USB. The RSK2+SH7269 board uses the SH7269 processor. It is often referred to as just rsk7269. Signed-off-by: Phil Edworthy Signed-off-by: Nobuhiro Iwamatsu --- arch/sh/include/asm/cpu_sh2.h | 2 ++ arch/sh/include/asm/cpu_sh7269.h | 26 ++++++++++++++++++++++++++ 2 files changed, 28 insertions(+) create mode 100644 arch/sh/include/asm/cpu_sh7269.h (limited to 'arch/sh/include/asm') diff --git a/arch/sh/include/asm/cpu_sh2.h b/arch/sh/include/asm/cpu_sh2.h index 767e189..28be591 100644 --- a/arch/sh/include/asm/cpu_sh2.h +++ b/arch/sh/include/asm/cpu_sh2.h @@ -35,6 +35,8 @@ # include #elif defined(CONFIG_CPU_SH7264) # include +#elif defined(CONFIG_CPU_SH7269) +# include #else # error "Unknown SH2 variant" #endif diff --git a/arch/sh/include/asm/cpu_sh7269.h b/arch/sh/include/asm/cpu_sh7269.h new file mode 100644 index 0000000..4dea708 --- /dev/null +++ b/arch/sh/include/asm/cpu_sh7269.h @@ -0,0 +1,26 @@ +#ifndef _ASM_CPU_SH7269_H_ +#define _ASM_CPU_SH7269_H_ + +/* Cache */ +#define CCR1 0xFFFC1000 +#define CCR CCR1 + +/* SCIF */ +#define SCSMR_0 0xE8007000 +#define SCIF0_BASE SCSMR_0 +#define SCSMR_1 0xE8007800 +#define SCIF1_BASE SCSMR_1 +#define SCSMR_2 0xE8008000 +#define SCIF2_BASE SCSMR_2 +#define SCSMR_3 0xE8008800 +#define SCIF3_BASE SCSMR_3 +#define SCSMR_7 0xE800A800 +#define SCIF7_BASE SCSMR_7 + +/* Timer(CMT) */ +#define CMSTR 0xFFFEC000 +#define CMCSR_0 0xFFFEC002 +#define CMCNT_0 0xFFFEC004 +#define CMCOR_0 0xFFFEC006 + +#endif /* _ASM_CPU_SH7269_H_ */ -- cgit v1.1