From 0151d99d74ec4b8a33133acf94ebcd25d717dfd7 Mon Sep 17 00:00:00 2001
From: Ying Zhang <b40530@freescale.com>
Date: Fri, 16 Aug 2013 15:16:10 +0800
Subject: powerpc: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and enabled
 some functionality for common SPL

1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/tlb.c | 3 ++-
 arch/powerpc/cpu/mpc8xxx/law.c | 6 ++++--
 2 files changed, 6 insertions(+), 3 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index da3c345..8748ecd 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -39,7 +39,8 @@ void init_tlbs(void)
 	return ;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
 		       phys_addr_t *rpn)
 {
diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index 89a561e..a401083 100644
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -76,7 +76,8 @@ void disable_law(u8 idx)
 	return;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 static int get_law_entry(u8 i, struct law_entry *e)
 {
 	u32 lawar;
@@ -106,7 +107,8 @@ int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 	return idx;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 {
 	u32 idx;
-- 
cgit v1.1


From bb0dc1084f5dcf1dfd951d320c932d08bccbe429 Mon Sep 17 00:00:00 2001
From: Ying Zhang <b40530@freescale.com>
Date: Fri, 16 Aug 2013 15:16:11 +0800
Subject: powerpc: mpc85xx: Support booting from SD Card with SPL

The code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
	* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that
	ddr spd code can get the interleaving mode setting in env. It loads
	final uboot image from offset 96KB.
	* final uboot image, size is variable depends on the functions enabled.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/u-boot-spl.lds              | 5 +++++
 arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 4 ++++
 2 files changed, 9 insertions(+)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index 08188d7..85ec74b 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -44,6 +44,11 @@ SECTIONS
 	}
 	_edata  =  .;
 
+	. = .;
+	__start___ex_table = .;
+	__ex_table : { *(__ex_table) }
+	__stop___ex_table = .;
+
 	. = ALIGN(8);
 	__init_begin = .;
 	__init_end = .;
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index e958e13..56128a7 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -218,12 +218,16 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
 		if (dimm_params[i].n_ranks) {
 			if (dimm_params[i].registered_dimm) {
 				temp1 = 1;
+#ifndef CONFIG_SPL_BUILD
 				printf("Detected RDIMM %s\n",
 					dimm_params[i].mpart);
+#endif
 			} else {
 				temp2 = 1;
+#ifndef CONFIG_SPL_BUILD
 				printf("Detected UDIMM %s\n",
 					dimm_params[i].mpart);
+#endif
 			}
 		}
 	}
-- 
cgit v1.1


From 997399fa42b098d0a4163e1a3461bd9a34aab8ac Mon Sep 17 00:00:00 2001
From: Prabhakar Kushwaha <prabhakar@freescale.com>
Date: Fri, 16 Aug 2013 14:52:26 +0530
Subject: powerpc: Fix CamelCase checkpatch warnings

85xx, 86xx PowerPC folders have code variables with CamelCase naming conventions.
because of this code checkpatch script generates "WARNING: Avoid CamelCase".

Convert variables name to normal naming convention and modify board, driver
files with updated the new structure.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/cpu.c   |  43 ++++++------
 arch/powerpc/cpu/mpc85xx/fdt.c   |  10 +--
 arch/powerpc/cpu/mpc85xx/speed.c | 142 +++++++++++++++++++--------------------
 arch/powerpc/cpu/mpc86xx/cpu.c   |  16 ++---
 arch/powerpc/cpu/mpc86xx/speed.c |  40 +++++------
 5 files changed, 127 insertions(+), 124 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 66bc6a2..b77964a 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -135,78 +135,79 @@ int checkcpu (void)
 		if (!(i & 3))
 			printf ("\n       ");
 		printf("CPU%d:%-4s MHz, ", core,
-			strmhz(buf1, sysinfo.freqProcessor[core]));
+			strmhz(buf1, sysinfo.freq_processor[core]));
 	}
-	printf("\n       CCB:%-4s MHz,\n", strmhz(buf1, sysinfo.freqSystemBus));
+	printf("\n       CCB:%-4s MHz,", strmhz(buf1, sysinfo.freq_systembus));
+	printf("\n");
 
 #ifdef CONFIG_FSL_CORENET
 	if (ddr_sync == 1) {
 		printf("       DDR:%-4s MHz (%s MT/s data rate) "
 			"(Synchronous), ",
-			strmhz(buf1, sysinfo.freqDDRBus/2),
-			strmhz(buf2, sysinfo.freqDDRBus));
+			strmhz(buf1, sysinfo.freq_ddrbus/2),
+			strmhz(buf2, sysinfo.freq_ddrbus));
 	} else {
 		printf("       DDR:%-4s MHz (%s MT/s data rate) "
 			"(Asynchronous), ",
-			strmhz(buf1, sysinfo.freqDDRBus/2),
-			strmhz(buf2, sysinfo.freqDDRBus));
+			strmhz(buf1, sysinfo.freq_ddrbus/2),
+			strmhz(buf2, sysinfo.freq_ddrbus));
 	}
 #else
 	switch (ddr_ratio) {
 	case 0x0:
 		printf("       DDR:%-4s MHz (%s MT/s data rate), ",
-			strmhz(buf1, sysinfo.freqDDRBus/2),
-			strmhz(buf2, sysinfo.freqDDRBus));
+			strmhz(buf1, sysinfo.freq_ddrbus/2),
+			strmhz(buf2, sysinfo.freq_ddrbus));
 		break;
 	case 0x7:
 		printf("       DDR:%-4s MHz (%s MT/s data rate) "
 			"(Synchronous), ",
-			strmhz(buf1, sysinfo.freqDDRBus/2),
-			strmhz(buf2, sysinfo.freqDDRBus));
+			strmhz(buf1, sysinfo.freq_ddrbus/2),
+			strmhz(buf2, sysinfo.freq_ddrbus));
 		break;
 	default:
 		printf("       DDR:%-4s MHz (%s MT/s data rate) "
 			"(Asynchronous), ",
-			strmhz(buf1, sysinfo.freqDDRBus/2),
-			strmhz(buf2, sysinfo.freqDDRBus));
+			strmhz(buf1, sysinfo.freq_ddrbus/2),
+			strmhz(buf2, sysinfo.freq_ddrbus));
 		break;
 	}
 #endif
 
 #if defined(CONFIG_FSL_LBC)
-	if (sysinfo.freqLocalBus > LCRR_CLKDIV) {
-		printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
+	if (sysinfo.freq_localbus > LCRR_CLKDIV) {
+		printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
 	} else {
 		printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n",
-		       sysinfo.freqLocalBus);
+		       sysinfo.freq_localbus);
 	}
 #endif
 
 #if defined(CONFIG_FSL_IFC)
-	printf("IFC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
+	printf("IFC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
 #endif
 
 #ifdef CONFIG_CPM2
-	printf("CPM:   %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus));
+	printf("CPM:   %s MHz\n", strmhz(buf1, sysinfo.freq_systembus));
 #endif
 
 #ifdef CONFIG_QE
-	printf("       QE:%-4s MHz\n", strmhz(buf1, sysinfo.freqQE));
+	printf("       QE:%-4s MHz\n", strmhz(buf1, sysinfo.freq_qe));
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 	for (i = 0; i < CONFIG_SYS_NUM_FMAN; i++) {
 		printf("       FMAN%d: %s MHz\n", i + 1,
-			strmhz(buf1, sysinfo.freqFMan[i]));
+			strmhz(buf1, sysinfo.freq_fman[i]));
 	}
 #endif
 
 #ifdef CONFIG_SYS_DPAA_QBMAN
-	printf("       QMAN:  %s MHz\n", strmhz(buf1, sysinfo.freqQMAN));
+	printf("       QMAN:  %s MHz\n", strmhz(buf1, sysinfo.freq_qman));
 #endif
 
 #ifdef CONFIG_SYS_DPAA_PME
-	printf("       PME:   %s MHz\n", strmhz(buf1, sysinfo.freqPME));
+	printf("       PME:   %s MHz\n", strmhz(buf1, sysinfo.freq_pme));
 #endif
 
 	puts("L1:    D-cache 32 kB enabled\n       I-cache 32 kB enabled\n");
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 84bb8fa..63a04f1 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -403,22 +403,22 @@ static void ft_fixup_dpaa_clks(void *blob)
 	get_sys_info(&sysinfo);
 #ifdef CONFIG_SYS_DPAA_FMAN
 	ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
-			sysinfo.freqFMan[0]);
+			sysinfo.freq_fman[0]);
 
 #if (CONFIG_SYS_NUM_FMAN == 2)
 	ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
-			sysinfo.freqFMan[1]);
+			sysinfo.freq_fman[1]);
 #endif
 #endif
 
 #ifdef CONFIG_SYS_DPAA_QBMAN
 	do_fixup_by_compat_u32(blob, "fsl,qman",
-			"clock-frequency", sysinfo.freqQMAN, 1);
+			"clock-frequency", sysinfo.freq_qman, 1);
 #endif
 
 #ifdef CONFIG_SYS_DPAA_PME
 	do_fixup_by_compat_u32(blob, "fsl,pme",
-		"clock-frequency", sysinfo.freqPME, 1);
+		"clock-frequency", sysinfo.freq_pme, 1);
 #endif
 }
 #else
@@ -616,7 +616,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
 	while (off != -FDT_ERR_NOTFOUND) {
 		u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
-		val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
+		val = cpu_to_fdt32(sysinfo.freq_processor[*reg]);
 		fdt_setprop(blob, off, "clock-frequency", &val, 4);
 		off = fdt_node_offset_by_prop_value(blob, off, "device_type",
 							"cpu", 4);
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index f093960..07690f9 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 /* --------------------------------------------------------------- */
 
-void get_sys_info (sys_info_t * sysInfo)
+void get_sys_info(sys_info_t *sys_info)
 {
 	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 #ifdef CONFIG_FSL_IFC
@@ -46,7 +46,7 @@ void get_sys_info (sys_info_t * sysInfo)
 		[14] = 3,	/* CC4 PPL / 4 */
 	};
 
-	const u8 core_cplx_PLL_div[16] = {
+	const u8 core_cplx_pll_div[16] = {
 		[ 0] = 1,	/* CC1 PPL / 1 */
 		[ 1] = 2,	/* CC1 PPL / 2 */
 		[ 2] = 4,	/* CC1 PPL / 4 */
@@ -60,26 +60,26 @@ void get_sys_info (sys_info_t * sysInfo)
 		[13] = 2,	/* CC4 PPL / 2 */
 		[14] = 4,	/* CC4 PPL / 4 */
 	};
-	uint i, freqCC_PLL[6], rcw_tmp;
+	uint i, freq_cc_pll[6], rcw_tmp;
 	uint ratio[6];
 	unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
 	uint mem_pll_rat;
 
-	sysInfo->freqSystemBus = sysclk;
+	sys_info->freq_systembus = sysclk;
 #ifdef CONFIG_DDR_CLK_FREQ
-	sysInfo->freqDDRBus = CONFIG_DDR_CLK_FREQ;
+	sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
 #else
-	sysInfo->freqDDRBus = sysclk;
+	sys_info->freq_ddrbus = sysclk;
 #endif
 
-	sysInfo->freqSystemBus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
+	sys_info->freq_systembus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
 	mem_pll_rat = (in_be32(&gur->rcwsr[0]) >>
 			FSL_CORENET_RCWSR0_MEM_PLL_RAT_SHIFT)
 			& FSL_CORENET_RCWSR0_MEM_PLL_RAT_MASK;
 	if (mem_pll_rat > 2)
-		sysInfo->freqDDRBus *= mem_pll_rat;
+		sys_info->freq_ddrbus *= mem_pll_rat;
 	else
-		sysInfo->freqDDRBus = sysInfo->freqSystemBus * mem_pll_rat;
+		sys_info->freq_ddrbus = sys_info->freq_systembus * mem_pll_rat;
 
 	ratio[0] = (in_be32(&clk->pllc1gsr) >> 1) & 0x3f;
 	ratio[1] = (in_be32(&clk->pllc2gsr) >> 1) & 0x3f;
@@ -89,9 +89,9 @@ void get_sys_info (sys_info_t * sysInfo)
 	ratio[5] = (in_be32(&clk->pllc6gsr) >> 1) & 0x3f;
 	for (i = 0; i < 6; i++) {
 		if (ratio[i] > 4)
-			freqCC_PLL[i] = sysclk * ratio[i];
+			freq_cc_pll[i] = sysclk * ratio[i];
 		else
-			freqCC_PLL[i] = sysInfo->freqSystemBus * ratio[i];
+			freq_cc_pll[i] = sys_info->freq_systembus * ratio[i];
 	}
 #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
 	/*
@@ -110,8 +110,8 @@ void get_sys_info (sys_info_t * sysInfo)
 			printf("Unsupported architecture configuration"
 				" in function %s\n", __func__);
 		cplx_pll += (cluster / 2) * 3;
-		sysInfo->freqProcessor[cpu] =
-			 freqCC_PLL[cplx_pll] / core_cplx_PLL_div[c_pll_sel];
+		sys_info->freq_processor[cpu] =
+			 freq_cc_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
 	}
 #ifdef CONFIG_PPC_B4860
 #define FM1_CLK_SEL	0xe0000000
@@ -127,63 +127,63 @@ void get_sys_info (sys_info_t * sysInfo)
 #ifdef CONFIG_SYS_DPAA_PME
 	switch ((rcw_tmp & PME_CLK_SEL) >> PME_CLK_SHIFT) {
 	case 1:
-		sysInfo->freqPME = freqCC_PLL[0];
+		sys_info->freq_pme = freq_cc_pll[0];
 		break;
 	case 2:
-		sysInfo->freqPME = freqCC_PLL[0] / 2;
+		sys_info->freq_pme = freq_cc_pll[0] / 2;
 		break;
 	case 3:
-		sysInfo->freqPME = freqCC_PLL[0] / 3;
+		sys_info->freq_pme = freq_cc_pll[0] / 3;
 		break;
 	case 4:
-		sysInfo->freqPME = freqCC_PLL[0] / 4;
+		sys_info->freq_pme = freq_cc_pll[0] / 4;
 		break;
 	case 6:
-		sysInfo->freqPME = freqCC_PLL[1] / 2;
+		sys_info->freq_pme = freq_cc_pll[1] / 2;
 		break;
 	case 7:
-		sysInfo->freqPME = freqCC_PLL[1] / 3;
+		sys_info->freq_pme = freq_cc_pll[1] / 3;
 		break;
 	default:
 		printf("Error: Unknown PME clock select!\n");
 	case 0:
-		sysInfo->freqPME = sysInfo->freqSystemBus / 2;
+		sys_info->freq_pme = sys_info->freq_systembus / 2;
 		break;
 
 	}
 #endif
 
 #ifdef CONFIG_SYS_DPAA_QBMAN
-	sysInfo->freqQMAN = sysInfo->freqSystemBus / 2;
+	sys_info->freq_qman = sys_info->freq_systembus / 2;
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 	switch ((rcw_tmp & FM1_CLK_SEL) >> FM1_CLK_SHIFT) {
 	case 1:
-		sysInfo->freqFMan[0] = freqCC_PLL[3];
+		sys_info->freq_fman[0] = freq_cc_pll[3];
 		break;
 	case 2:
-		sysInfo->freqFMan[0] = freqCC_PLL[3] / 2;
+		sys_info->freq_fman[0] = freq_cc_pll[3] / 2;
 		break;
 	case 3:
-		sysInfo->freqFMan[0] = freqCC_PLL[3] / 3;
+		sys_info->freq_fman[0] = freq_cc_pll[3] / 3;
 		break;
 	case 4:
-		sysInfo->freqFMan[0] = freqCC_PLL[3] / 4;
+		sys_info->freq_fman[0] = freq_cc_pll[3] / 4;
 		break;
 	case 5:
-		sysInfo->freqFMan[0] = sysInfo->freqSystemBus;
+		sys_info->freq_fman[0] = sys_info->freq_systembus;
 		break;
 	case 6:
-		sysInfo->freqFMan[0] = freqCC_PLL[4] / 2;
+		sys_info->freq_fman[0] = freq_cc_pll[4] / 2;
 		break;
 	case 7:
-		sysInfo->freqFMan[0] = freqCC_PLL[4] / 3;
+		sys_info->freq_fman[0] = freq_cc_pll[4] / 3;
 		break;
 	default:
 		printf("Error: Unknown FMan1 clock select!\n");
 	case 0:
-		sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2;
+		sys_info->freq_fman[0] = sys_info->freq_systembus / 2;
 		break;
 	}
 #if (CONFIG_SYS_NUM_FMAN) == 2
@@ -192,27 +192,27 @@ void get_sys_info (sys_info_t * sysInfo)
 	rcw_tmp = in_be32(&gur->rcwsr[15]);
 	switch ((rcw_tmp & FM2_CLK_SEL) >> FM2_CLK_SHIFT) {
 	case 1:
-		sysInfo->freqFMan[1] = freqCC_PLL[4];
+		sys_info->freq_fman[1] = freq_cc_pll[4];
 		break;
 	case 2:
-		sysInfo->freqFMan[1] = freqCC_PLL[4] / 2;
+		sys_info->freq_fman[1] = freq_cc_pll[4] / 2;
 		break;
 	case 3:
-		sysInfo->freqFMan[1] = freqCC_PLL[4] / 3;
+		sys_info->freq_fman[1] = freq_cc_pll[4] / 3;
 		break;
 	case 4:
-		sysInfo->freqFMan[1] = freqCC_PLL[4] / 4;
+		sys_info->freq_fman[1] = freq_cc_pll[4] / 4;
 		break;
 	case 6:
-		sysInfo->freqFMan[1] = freqCC_PLL[3] / 2;
+		sys_info->freq_fman[1] = freq_cc_pll[3] / 2;
 		break;
 	case 7:
-		sysInfo->freqFMan[1] = freqCC_PLL[3] / 3;
+		sys_info->freq_fman[1] = freq_cc_pll[3] / 3;
 		break;
 	default:
 		printf("Error: Unknown FMan2 clock select!\n");
 	case 0:
-		sysInfo->freqFMan[1] = sysInfo->freqSystemBus / 2;
+		sys_info->freq_fman[1] = sys_info->freq_systembus / 2;
 		break;
 	}
 #endif	/* CONFIG_SYS_NUM_FMAN == 2 */
@@ -225,8 +225,8 @@ void get_sys_info (sys_info_t * sysInfo)
 				& 0xf;
 		u32 cplx_pll = core_cplx_PLL[c_pll_sel];
 
-		sysInfo->freqProcessor[cpu] =
-			 freqCC_PLL[cplx_pll] / core_cplx_PLL_div[c_pll_sel];
+		sys_info->freq_processor[cpu] =
+			 freq_cc_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
 	}
 #define PME_CLK_SEL	0x80000000
 #define FM1_CLK_SEL	0x40000000
@@ -246,43 +246,43 @@ void get_sys_info (sys_info_t * sysInfo)
 #ifdef CONFIG_SYS_DPAA_PME
 	if (rcw_tmp & PME_CLK_SEL) {
 		if (rcw_tmp & HWA_ASYNC_DIV)
-			sysInfo->freqPME = freqCC_PLL[HWA_CC_PLL] / 4;
+			sys_info->freq_pme = freq_cc_pll[HWA_CC_PLL] / 4;
 		else
-			sysInfo->freqPME = freqCC_PLL[HWA_CC_PLL] / 2;
+			sys_info->freq_pme = freq_cc_pll[HWA_CC_PLL] / 2;
 	} else {
-		sysInfo->freqPME = sysInfo->freqSystemBus / 2;
+		sys_info->freq_pme = sys_info->freq_systembus / 2;
 	}
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 	if (rcw_tmp & FM1_CLK_SEL) {
 		if (rcw_tmp & HWA_ASYNC_DIV)
-			sysInfo->freqFMan[0] = freqCC_PLL[HWA_CC_PLL] / 4;
+			sys_info->freq_fman[0] = freq_cc_pll[HWA_CC_PLL] / 4;
 		else
-			sysInfo->freqFMan[0] = freqCC_PLL[HWA_CC_PLL] / 2;
+			sys_info->freq_fman[0] = freq_cc_pll[HWA_CC_PLL] / 2;
 	} else {
-		sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2;
+		sys_info->freq_fman[0] = sys_info->freq_systembus / 2;
 	}
 #if (CONFIG_SYS_NUM_FMAN) == 2
 	if (rcw_tmp & FM2_CLK_SEL) {
 		if (rcw_tmp & HWA_ASYNC_DIV)
-			sysInfo->freqFMan[1] = freqCC_PLL[HWA_CC_PLL] / 4;
+			sys_info->freq_fman[1] = freq_cc_pll[HWA_CC_PLL] / 4;
 		else
-			sysInfo->freqFMan[1] = freqCC_PLL[HWA_CC_PLL] / 2;
+			sys_info->freq_fman[1] = freq_cc_pll[HWA_CC_PLL] / 2;
 	} else {
-		sysInfo->freqFMan[1] = sysInfo->freqSystemBus / 2;
+		sys_info->freq_fman[1] = sys_info->freq_systembus / 2;
 	}
 #endif
 #endif
 
 #ifdef CONFIG_SYS_DPAA_QBMAN
-	sysInfo->freqQMAN = sysInfo->freqSystemBus / 2;
+	sys_info->freq_qman = sys_info->freq_systembus / 2;
 #endif
 
 #endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
 
 #else /* CONFIG_FSL_CORENET */
-	uint plat_ratio, e500_ratio, half_freqSystemBus;
+	uint plat_ratio, e500_ratio, half_freq_systembus;
 	int i;
 #ifdef CONFIG_QE
 	__maybe_unused u32 qe_ratio;
@@ -290,40 +290,40 @@ void get_sys_info (sys_info_t * sysInfo)
 
 	plat_ratio = (gur->porpllsr) & 0x0000003e;
 	plat_ratio >>= 1;
-	sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
+	sys_info->freq_systembus = plat_ratio * CONFIG_SYS_CLK_FREQ;
 
 	/* Divide before multiply to avoid integer
 	 * overflow for processor speeds above 2GHz */
-	half_freqSystemBus = sysInfo->freqSystemBus/2;
+	half_freq_systembus = sys_info->freq_systembus/2;
 	for (i = 0; i < cpu_numcores(); i++) {
 		e500_ratio = ((gur->porpllsr) >> (i * 8 + 16)) & 0x3f;
-		sysInfo->freqProcessor[i] = e500_ratio * half_freqSystemBus;
+		sys_info->freq_processor[i] = e500_ratio * half_freq_systembus;
 	}
 
-	/* Note: freqDDRBus is the MCLK frequency, not the data rate. */
-	sysInfo->freqDDRBus = sysInfo->freqSystemBus;
+	/* Note: freq_ddrbus is the MCLK frequency, not the data rate. */
+	sys_info->freq_ddrbus = sys_info->freq_systembus;
 
 #ifdef CONFIG_DDR_CLK_FREQ
 	{
 		u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
 			>> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
 		if (ddr_ratio != 0x7)
-			sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
+			sys_info->freq_ddrbus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
 	}
 #endif
 
 #ifdef CONFIG_QE
 #if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
-	sysInfo->freqQE =  sysInfo->freqSystemBus;
+	sys_info->freq_qe =  sys_info->freq_systembus;
 #else
 	qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO)
 			>> MPC85xx_PORPLLSR_QE_RATIO_SHIFT;
-	sysInfo->freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ;
+	sys_info->freq_qe = qe_ratio * CONFIG_SYS_CLK_FREQ;
 #endif
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-		sysInfo->freqFMan[0] = sysInfo->freqSystemBus;
+		sys_info->freq_fman[0] = sys_info->freq_systembus;
 #endif
 
 #endif /* CONFIG_FSL_CORENET */
@@ -350,10 +350,10 @@ void get_sys_info (sys_info_t * sysInfo)
 		 */
 		lcrr_div *= 2;
 #endif
-		sysInfo->freqLocalBus = sysInfo->freqSystemBus / lcrr_div;
+		sys_info->freq_localbus = sys_info->freq_systembus / lcrr_div;
 	} else {
 		/* In case anyone cares what the unknown value is */
-		sysInfo->freqLocalBus = lcrr_div;
+		sys_info->freq_localbus = lcrr_div;
 	}
 #endif
 
@@ -361,7 +361,7 @@ void get_sys_info (sys_info_t * sysInfo)
 	ccr = in_be32(&ifc_regs->ifc_ccr);
 	ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
 
-	sysInfo->freqLocalBus = sysInfo->freqSystemBus / ccr;
+	sys_info->freq_localbus = sys_info->freq_systembus / ccr;
 #endif
 }
 
@@ -382,13 +382,13 @@ int get_clocks (void)
 	dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT;
 #endif
 	get_sys_info (&sys_info);
-	gd->cpu_clk = sys_info.freqProcessor[0];
-	gd->bus_clk = sys_info.freqSystemBus;
-	gd->mem_clk = sys_info.freqDDRBus;
-	gd->arch.lbc_clk = sys_info.freqLocalBus;
+	gd->cpu_clk = sys_info.freq_processor[0];
+	gd->bus_clk = sys_info.freq_systembus;
+	gd->mem_clk = sys_info.freq_ddrbus;
+	gd->arch.lbc_clk = sys_info.freq_localbus;
 
 #ifdef CONFIG_QE
-	gd->arch.qe_clk = sys_info.freqQE;
+	gd->arch.qe_clk = sys_info.freq_qe;
 	gd->arch.brg_clk = gd->arch.qe_clk / 2;
 #endif
 	/*
@@ -400,7 +400,7 @@ int get_clocks (void)
 	 */
 #if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
 	defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
-	gd->arch.i2c1_clk = sys_info.freqSystemBus;
+	gd->arch.i2c1_clk = sys_info.freq_systembus;
 #elif defined(CONFIG_MPC8544)
 	/*
 	 * On the 8544, the I2C clock is the same as the SEC clock.  This can be
@@ -410,12 +410,12 @@ int get_clocks (void)
 	 * PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
 	 */
 	if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
-		gd->arch.i2c1_clk = sys_info.freqSystemBus / 3;
+		gd->arch.i2c1_clk = sys_info.freq_systembus / 3;
 	else
-		gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
+		gd->arch.i2c1_clk = sys_info.freq_systembus / 2;
 #else
 	/* Most 85xx SOCs use CCB/2, so this is the default behavior. */
-	gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
+	gd->arch.i2c1_clk = sys_info.freq_systembus / 2;
 #endif
 	gd->arch.i2c2_clk = gd->arch.i2c1_clk;
 
@@ -429,7 +429,7 @@ int get_clocks (void)
 #endif /* defined(CONFIG_FSL_ESDHC) */
 
 #if defined(CONFIG_CPM2)
-	gd->arch.vco_out = 2*sys_info.freqSystemBus;
+	gd->arch.vco_out = 2*sys_info.freq_systembus;
 	gd->arch.cpm_clk = gd->arch.vco_out / 2;
 	gd->arch.scc_clk = gd->arch.vco_out / 4;
 	gd->arch.brg_clk = gd->arch.vco_out / (1 << (2 * (dfbrg + 1)));
diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c
index d6b28dd..ab3250b 100644
--- a/arch/powerpc/cpu/mpc86xx/cpu.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu.c
@@ -72,17 +72,17 @@ checkcpu(void)
 	get_sys_info(&sysinfo);
 
 	puts("Clock Configuration:\n");
-	printf("       CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freqProcessor));
-	printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freqSystemBus));
+	printf("       CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freq_processor));
+	printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freq_systembus));
 	printf("       DDR:%-4s MHz (%s MT/s data rate), ",
-		strmhz(buf1, sysinfo.freqSystemBus / 2),
-		strmhz(buf2, sysinfo.freqSystemBus));
+		strmhz(buf1, sysinfo.freq_systembus / 2),
+		strmhz(buf2, sysinfo.freq_systembus));
 
-	if (sysinfo.freqLocalBus > LCRR_CLKDIV) {
-		printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
+	if (sysinfo.freq_localbus > LCRR_CLKDIV) {
+		printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
 	} else {
 		printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n",
-		       sysinfo.freqLocalBus);
+		       sysinfo.freq_localbus);
 	}
 
 	puts("L1:    D-cache 32 KB enabled\n");
@@ -131,7 +131,7 @@ get_tbclk(void)
 	sys_info_t sys_info;
 
 	get_sys_info(&sys_info);
-	return (sys_info.freqSystemBus + 3L) / 4L;
+	return (sys_info.freq_systembus + 3L) / 4L;
 }
 
 
diff --git a/arch/powerpc/cpu/mpc86xx/speed.c b/arch/powerpc/cpu/mpc86xx/speed.c
index ea366ab..854d02b 100644
--- a/arch/powerpc/cpu/mpc86xx/speed.c
+++ b/arch/powerpc/cpu/mpc86xx/speed.c
@@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
 /* used in some defintiions of CONFIG_SYS_CLK_FREQ */
 extern unsigned long get_board_sys_clk(unsigned long dummy);
 
-void get_sys_info(sys_info_t *sysInfo)
+void get_sys_info(sys_info_t *sys_info)
 {
 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile ccsr_gur_t *gur = &immap->im_gur;
@@ -31,7 +31,7 @@ void get_sys_info(sys_info_t *sysInfo)
 
 	switch (plat_ratio) {
 	case 0x0:
-		sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
+		sys_info->freq_systembus = 16 * CONFIG_SYS_CLK_FREQ;
 		break;
 	case 0x02:
 	case 0x03:
@@ -43,10 +43,10 @@ void get_sys_info(sys_info_t *sysInfo)
 	case 0x0a:
 	case 0x0c:
 	case 0x10:
-		sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
+		sys_info->freq_systembus = plat_ratio * CONFIG_SYS_CLK_FREQ;
 		break;
 	default:
-		sysInfo->freqSystemBus = 0;
+		sys_info->freq_systembus = 0;
 		break;
 	}
 
@@ -55,25 +55,26 @@ void get_sys_info(sys_info_t *sysInfo)
 
 	switch (e600_ratio) {
 	case 0x10:
-		sysInfo->freqProcessor = 2 * sysInfo->freqSystemBus;
+		sys_info->freq_processor = 2 * sys_info->freq_systembus;
 		break;
 	case 0x19:
-		sysInfo->freqProcessor = 5 * sysInfo->freqSystemBus / 2;
+		sys_info->freq_processor = 5 * sys_info->freq_systembus / 2;
 		break;
 	case 0x20:
-		sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus;
+		sys_info->freq_processor = 3 * sys_info->freq_systembus;
 		break;
 	case 0x39:
-		sysInfo->freqProcessor = 7 * sysInfo->freqSystemBus / 2;
+		sys_info->freq_processor = 7 * sys_info->freq_systembus / 2;
 		break;
 	case 0x28:
-		sysInfo->freqProcessor = 4 * sysInfo->freqSystemBus;
+		sys_info->freq_processor = 4 * sys_info->freq_systembus;
 		break;
 	case 0x1d:
-		sysInfo->freqProcessor = 9 * sysInfo->freqSystemBus / 2;
+		sys_info->freq_processor = 9 * sys_info->freq_systembus / 2;
 		break;
 	default:
-		sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
+		sys_info->freq_processor = e600_ratio +
+						sys_info->freq_systembus;
 		break;
 	}
 
@@ -84,10 +85,11 @@ void get_sys_info(sys_info_t *sysInfo)
 	lcrr_div = in_be32(&immap->im_lbc.lcrr) & LCRR_CLKDIV;
 #endif
 	if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
-		sysInfo->freqLocalBus = sysInfo->freqSystemBus / (lcrr_div * 2);
+		sys_info->freq_localbus = sys_info->freq_systembus
+							/ (lcrr_div * 2);
 	} else {
 		/* In case anyone cares what the unknown value is */
-		sysInfo->freqLocalBus = lcrr_div;
+		sys_info->freq_localbus = lcrr_div;
 	}
 }
 
@@ -102,9 +104,9 @@ int get_clocks(void)
 	sys_info_t sys_info;
 
 	get_sys_info(&sys_info);
-	gd->cpu_clk = sys_info.freqProcessor;
-	gd->bus_clk = sys_info.freqSystemBus;
-	gd->arch.lbc_clk = sys_info.freqLocalBus;
+	gd->cpu_clk = sys_info.freq_processor;
+	gd->bus_clk = sys_info.freq_systembus;
+	gd->arch.lbc_clk = sys_info.freq_localbus;
 
 	/*
 	 * The base clock for I2C depends on the actual SOC.  Unfortunately,
@@ -114,9 +116,9 @@ int get_clocks(void)
 	 * AN2919.
 	 */
 #ifdef CONFIG_MPC8610
-	gd->arch.i2c1_clk = sys_info.freqSystemBus;
+	gd->arch.i2c1_clk = sys_info.freq_systembus;
 #else
-	gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
+	gd->arch.i2c1_clk = sys_info.freq_systembus / 2;
 #endif
 	gd->arch.i2c2_clk = gd->arch.i2c1_clk;
 
@@ -138,7 +140,7 @@ ulong get_bus_freq(ulong dummy)
 	sys_info_t sys_info;
 
 	get_sys_info(&sys_info);
-	val = sys_info.freqSystemBus;
+	val = sys_info.freq_systembus;
 
 	return val;
 }
-- 
cgit v1.1


From 2f848f97d7b27a88135de98aae76531a6fdd44e6 Mon Sep 17 00:00:00 2001
From: Shruti Kanetkar <Shruti@Freescale.com>
Date: Thu, 15 Aug 2013 11:25:37 -0500
Subject: powerpc: Use print_size() where appropriate

Makes the startup output more consistent

Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc824x/cpu.c      |  8 +++-----
 arch/powerpc/cpu/mpc85xx/cpu_init.c |  8 +++++---
 arch/powerpc/cpu/mpc8xx/cpu.c       | 24 +++++++++++-------------
 arch/powerpc/cpu/mpc8xxx/ddr/main.c |  3 ++-
 4 files changed, 21 insertions(+), 22 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc824x/cpu.c b/arch/powerpc/cpu/mpc824x/cpu.c
index ee69e49..7ed38c8 100644
--- a/arch/powerpc/cpu/mpc824x/cpu.c
+++ b/arch/powerpc/cpu/mpc824x/cpu.c
@@ -45,12 +45,10 @@ int checkcpu (void)
 		return -1;		/* no valid CPU revision info */
 	}
 
-	printf (" at %s MHz:", strmhz (buf, clock));
+	printf (" at %s MHz: ", strmhz (buf, clock));
 
-	printf (" %u kB I-Cache", checkicache () >> 10);
-	printf (" %u kB D-Cache", checkdcache () >> 10);
-
-	puts ("\n");
+	print_size(checkicache(), " I-Cache ");
+	print_size(checkdcache(), " D-Cache\n");
 
 	return 0;
 }
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 2d65157..565c281 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -167,7 +167,8 @@ static void enable_cpc(void)
 
 	}
 
-	printf("Corenet Platform Cache: %d KB enabled\n", size);
+	puts("Corenet Platform Cache: ");
+	print_size(size * 1024, " enabled\n");
 }
 
 static void invalidate_cpc(void)
@@ -526,13 +527,14 @@ int cpu_init_r(void)
 	if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) {
 		while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E))
 			;
-		printf("%d KB enabled\n", (l2cfg0 & 0x3fff) * 64);
+		print_size((l2cfg0 & 0x3fff) * 64 * 1024, " enabled\n");
 	}
 
 skip_l2:
 #elif defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
 	if (l2cache->l2csr0 & L2CSR0_L2E)
-		printf("%d KB enabled\n", (l2cache->l2cfg0 & 0x3fff) * 64);
+		print_size((l2cache->l2cfg0 & 0x3fff) * 64 * 1024,
+			   " enabled\n");
 
 	enable_cluster_l2();
 #else
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 1550045..63668b6 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -136,10 +136,8 @@ static int check_CPU (long clock, uint pvr, uint immr)
 #else
 	printf (" at %s MHz: ", strmhz (buf, clock));
 #endif
-	printf ("%u kB I-Cache %u kB D-Cache",
-		checkicache () >> 10,
-		checkdcache () >> 10
-	);
+	print_size(checkicache(), " I-Cache ");
+	print_size(checkdcache(), " D-Cache");
 
 	/* do we have a FEC (860T/P or 852/859/866/885)? */
 
@@ -204,10 +202,10 @@ static int check_CPU (long clock, uint pvr, uint immr)
 		printf ("unknown MPC857 (0x%08x)", k);
 #endif
 
-	printf (" at %s MHz:", strmhz (buf, clock));
+	printf (" at %s MHz: ", strmhz (buf, clock));
 
-	printf (" %u kB I-Cache", checkicache () >> 10);
-	printf (" %u kB D-Cache", checkdcache () >> 10);
+	print_size(checkicache(), " I-Cache ");
+	print_size(checkdcache(), " D-Cache");
 
 	/* lets check and see if we're running on a 862T (or P?) */
 
@@ -265,10 +263,10 @@ static int check_CPU (long clock, uint pvr, uint immr)
 	if (suf)
 		printf ("PPC823ZTnn%s", suf);
 
-	printf (" at %s MHz:", strmhz (buf, clock));
+	printf (" at %s MHz: ", strmhz (buf, clock));
 
-	printf (" %u kB I-Cache", checkicache () >> 10);
-	printf (" %u kB D-Cache", checkdcache () >> 10);
+	print_size(checkicache(), " I-Cache ");
+	print_size(checkdcache(), " D-Cache");
 
 	/* lets check and see if we're running on a 860T (or P?) */
 
@@ -321,10 +319,10 @@ static int check_CPU (long clock, uint pvr, uint immr)
 	default:
 		printf ("unknown MPC850 (0x%08x)", k);
 	}
-	printf (" at %s MHz:", strmhz (buf, clock));
+	printf (" at %s MHz: ", strmhz (buf, clock));
 
-	printf (" %u kB I-Cache", checkicache () >> 10);
-	printf (" %u kB D-Cache", checkdcache () >> 10);
+	print_size(checkicache(), " I-Cache ");
+	print_size(checkdcache(), " D-Cache");
 
 	/* lets check and see if we're running on a 850T (or P?) */
 
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index 9f4f253..842bf19 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
@@ -683,7 +683,8 @@ phys_size_t fsl_ddr_sdram(void)
 #if !defined(CONFIG_PHYS_64BIT)
 	/* Check for 4G or more.  Bad. */
 	if (total_memory >= (1ull << 32)) {
-		printf("Detected %lld MB of memory\n", total_memory >> 20);
+		puts("Detected ");
+		print_size(total_memory, " of memory\n");
 		printf("       This U-Boot only supports < 4G of DDR\n");
 		printf("       You could rebuild it with CONFIG_PHYS_64BIT\n");
 		printf("       "); /* re-align to match init_func_ram print */
-- 
cgit v1.1


From 6b44d9e5b79948a73f9fae4b84c21f62224fa46b Mon Sep 17 00:00:00 2001
From: Shruti Kanetkar <Shruti@Freescale.com>
Date: Thu, 15 Aug 2013 11:25:38 -0500
Subject: powerpcv2: Print hardcoded size like print_size() does

Makes the startup output more consistent

Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc824x/cpu.c      |  2 +-
 arch/powerpc/cpu/mpc85xx/cpu.c      |  2 +-
 arch/powerpc/cpu/mpc85xx/cpu_init.c | 14 +++++++-------
 arch/powerpc/cpu/mpc86xx/cpu.c      |  6 +++---
 arch/powerpc/cpu/mpc8xx/cpu.c       |  6 +++---
 arch/powerpc/cpu/mpc8xx/video.c     |  4 ++--
 arch/powerpc/cpu/ppc4xx/cpu.c       |  8 ++++----
 7 files changed, 21 insertions(+), 21 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc824x/cpu.c b/arch/powerpc/cpu/mpc824x/cpu.c
index 7ed38c8..eaa4e87 100644
--- a/arch/powerpc/cpu/mpc824x/cpu.c
+++ b/arch/powerpc/cpu/mpc824x/cpu.c
@@ -45,7 +45,7 @@ int checkcpu (void)
 		return -1;		/* no valid CPU revision info */
 	}
 
-	printf (" at %s MHz: ", strmhz (buf, clock));
+	printf(" at %s MHz: ", strmhz(buf, clock));
 
 	print_size(checkicache(), " I-Cache ");
 	print_size(checkdcache(), " D-Cache\n");
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index b77964a..1a0196c 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -210,7 +210,7 @@ int checkcpu (void)
 	printf("       PME:   %s MHz\n", strmhz(buf1, sysinfo.freq_pme));
 #endif
 
-	puts("L1:    D-cache 32 kB enabled\n       I-cache 32 kB enabled\n");
+	puts("L1:    D-cache 32 KiB enabled\n       I-cache 32 KiB enabled\n");
 
 #ifdef CONFIG_FSL_CORENET
 	/* Display the RCW, so that no one gets confused as to what RCW
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 565c281..c6e09ca 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -458,28 +458,28 @@ int cpu_init_r(void)
 	case 0x1:
 		if (ver == SVR_8540 || ver == SVR_8560   ||
 		    ver == SVR_8541 || ver == SVR_8555) {
-			puts("128 KB ");
-			/* set L2E=1, L2I=1, & L2BLKSZ=1 (128 Kbyte) */
+			puts("128 KiB ");
+			/* set L2E=1, L2I=1, & L2BLKSZ=1 (128 KiBibyte) */
 			cache_ctl = 0xc4000000;
 		} else {
-			puts("256 KB ");
+			puts("256 KiB ");
 			cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */
 		}
 		break;
 	case 0x2:
 		if (ver == SVR_8540 || ver == SVR_8560   ||
 		    ver == SVR_8541 || ver == SVR_8555) {
-			puts("256 KB ");
-			/* set L2E=1, L2I=1, & L2BLKSZ=2 (256 Kbyte) */
+			puts("256 KiB ");
+			/* set L2E=1, L2I=1, & L2BLKSZ=2 (256 KiBibyte) */
 			cache_ctl = 0xc8000000;
 		} else {
-			puts ("512 KB ");
+			puts("512 KiB ");
 			/* set L2E=1, L2I=1, & L2SRAM=0 */
 			cache_ctl = 0xc0000000;
 		}
 		break;
 	case 0x3:
-		puts("1024 KB ");
+		puts("1024 KiB ");
 		/* set L2E=1, L2I=1, & L2SRAM=0 */
 		cache_ctl = 0xc0000000;
 		break;
diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c
index ab3250b..3051854 100644
--- a/arch/powerpc/cpu/mpc86xx/cpu.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu.c
@@ -85,8 +85,8 @@ checkcpu(void)
 		       sysinfo.freq_localbus);
 	}
 
-	puts("L1:    D-cache 32 KB enabled\n");
-	puts("       I-cache 32 KB enabled\n");
+	puts("L1:    D-cache 32 KiB enabled\n");
+	puts("       I-cache 32 KiB enabled\n");
 
 	puts("L2:    ");
 	if (get_l2cr() & 0x80000000) {
@@ -95,7 +95,7 @@ checkcpu(void)
 #elif defined(CONFIG_MPC8641)
 		puts("512");
 #endif
-		puts(" KB enabled\n");
+		puts(" KiB enabled\n");
 	} else {
 		puts("Disabled\n");
 	}
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 63668b6..5c96b5f 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -202,7 +202,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
 		printf ("unknown MPC857 (0x%08x)", k);
 #endif
 
-	printf (" at %s MHz: ", strmhz (buf, clock));
+	printf(" at %s MHz: ", strmhz(buf, clock));
 
 	print_size(checkicache(), " I-Cache ");
 	print_size(checkdcache(), " D-Cache");
@@ -263,7 +263,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
 	if (suf)
 		printf ("PPC823ZTnn%s", suf);
 
-	printf (" at %s MHz: ", strmhz (buf, clock));
+	printf(" at %s MHz: ", strmhz(buf, clock));
 
 	print_size(checkicache(), " I-Cache ");
 	print_size(checkdcache(), " D-Cache");
@@ -319,7 +319,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
 	default:
 		printf ("unknown MPC850 (0x%08x)", k);
 	}
-	printf (" at %s MHz: ", strmhz (buf, clock));
+	printf(" at %s MHz: ", strmhz(buf, clock));
 
 	print_size(checkicache(), " I-Cache ");
 	print_size(checkdcache(), " D-Cache");
diff --git a/arch/powerpc/cpu/mpc8xx/video.c b/arch/powerpc/cpu/mpc8xx/video.c
index 02a0467..fc35158 100644
--- a/arch/powerpc/cpu/mpc8xx/video.c
+++ b/arch/powerpc/cpu/mpc8xx/video.c
@@ -1176,7 +1176,7 @@ static void *video_logo (void)
 #ifndef CONFIG_FADS		/* all normal boards */
 	/* leave one blank line */
 
-	sprintf (info, "MPC823 CPU at %s MHz, %ld MB RAM, %ld MB Flash",
+	sprintf(info, "MPC823 CPU at %s MHz, %ld MiB RAM, %ld MiB Flash",
 		strmhz(temp, gd->cpu_clk),
 		gd->ram_size >> 20,
 		gd->bd->bi_flashsize >> 20 );
@@ -1187,7 +1187,7 @@ static void *video_logo (void)
 	video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT,
 					  info);
 
-	sprintf (info, "2MB FLASH - 8MB DRAM - 4MB SRAM");
+	sprintf(info, "2MiB FLASH - 8MiB DRAM - 4MiB SRAM");
 	video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT * 2,
 					  info);
 #endif
diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index fe05098..78d212d 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -647,12 +647,12 @@ int checkcpu (void)
 #endif
 
 #if defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX)
-	printf ("       16 kB I-Cache 16 kB D-Cache");
+	printf("       16 KiB I-Cache 16 KiB D-Cache");
 #elif defined(CONFIG_440)
-	printf ("       32 kB I-Cache 32 kB D-Cache");
+	printf("       32 KiB I-Cache 32 KiB D-Cache");
 #else
-	printf ("       16 kB I-Cache %d kB D-Cache",
-		((pvr | 0x00000001) == PVR_405GPR_RB) ? 16 : 8);
+	printf("       16 KiB I-Cache %d KiB D-Cache",
+	       ((pvr | 0x00000001) == PVR_405GPR_RB) ? 16 : 8);
 #endif
 
 #endif /* !defined(CONFIG_405) */
-- 
cgit v1.1


From 1c68d01eea92137482b980318e2a7f7c0ebef2d4 Mon Sep 17 00:00:00 2001
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Date: Mon, 19 Aug 2013 18:58:52 +0800
Subject: powerpc/t4240: add QSGMII interface support

Also some fix for QSGMII.
1. fix QSGMII configure of Serdes2.
2. fix PHY address of QSGMII MAC9 & MAC10 for each FMAN.
3. fix dtb for QSGMII interface.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/t4240_serdes.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c
index ed88602..ff55e3c 100644
--- a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c
@@ -106,25 +106,25 @@ static const struct serdes_config serdes2_cfg_tbl[] = {
 		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
 		SGMII_FM2_DTSEC3, SGMII_FM2_DTSEC4}},
 	{38, {NONE, NONE, QSGMII_FM2_B, NONE,
-		NONE, NONE, QSGMII_FM1_A, NONE}},
+		NONE, NONE, QSGMII_FM2_A, NONE} },
 	{40, {SGMII_FM2_DTSEC5, SGMII_FM2_DTSEC6,
 		SGMII_FM2_DTSEC10, SGMII_FM2_DTSEC9,
-		NONE, NONE, QSGMII_FM1_A, NONE}},
+		NONE, NONE, QSGMII_FM2_A, NONE} },
 	{46, {SGMII_FM2_DTSEC5, SGMII_FM2_DTSEC6,
 		SGMII_FM2_DTSEC10, SGMII_FM2_DTSEC9,
-		NONE, NONE, QSGMII_FM1_A, NONE}},
+		NONE, NONE, QSGMII_FM2_A, NONE} },
 	{48, {SGMII_FM2_DTSEC5, SGMII_FM2_DTSEC6,
 		SGMII_FM2_DTSEC10, SGMII_FM2_DTSEC9,
-		NONE, NONE, QSGMII_FM1_A, NONE}},
+		NONE, NONE, QSGMII_FM2_A, NONE} },
 	{50, {XAUI_FM2_MAC9, XAUI_FM2_MAC9,
 		XAUI_FM2_MAC9, XAUI_FM2_MAC9,
-		NONE, NONE, QSGMII_FM1_A, NONE}},
+		NONE, NONE, QSGMII_FM2_A, NONE} },
 	{52, {HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
 		HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
-		NONE, NONE, QSGMII_FM1_A, NONE}},
+		NONE, NONE, QSGMII_FM2_A, NONE} },
 	{54, {HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
 		HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
-		NONE, NONE, QSGMII_FM1_A, NONE}},
+		NONE, NONE, QSGMII_FM2_A, NONE} },
 	{56, {XFI_FM1_MAC9, XFI_FM1_MAC10,
 		XFI_FM2_MAC10, XFI_FM2_MAC9,
 		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
-- 
cgit v1.1


From 424bf94273b2cd0171eca7ed5619b211f1b96d8f Mon Sep 17 00:00:00 2001
From: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Date: Thu, 15 Aug 2013 09:31:47 +0800
Subject: powerpc/sec: Add workaround for SEC A-003571

Multiple read/write transactions initiated by security
engine may cause system to hang.
Workaround: set MCFGR[AXIPIPE] to 0 to avoid hang.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/cmd_errata.c     |  4 ++++
 arch/powerpc/cpu/mpc85xx/cpu_init.c       | 10 +++++++++-
 arch/powerpc/include/asm/config_mpc85xx.h |  1 +
 3 files changed, 14 insertions(+), 1 deletion(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index cbb443f..8a2a3ee 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -245,6 +245,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #ifdef CONFIG_SYS_FSL_ERRATUM_A006593
 	puts("Work-around for Erratum A006593 enabled\n");
 #endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571
+	if (IS_SVR_REV(svr, 1, 0))
+		puts("Work-around for Erratum A003571 enabled\n");
+#endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_A005812
 	puts("Work-around for Erratum A-005812 enabled\n");
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index c6e09ca..6036333 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -357,7 +357,9 @@ int cpu_init_r(void)
 	extern int spin_table_compat;
 	const char *spin;
 #endif
-
+#ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571
+	ccsr_sec_t __iomem *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
+#endif
 #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) || \
 	defined(CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011)
 	/*
@@ -548,6 +550,12 @@ skip_l2:
 	fsl_serdes_init();
 #endif
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571
+#define MCFGR_AXIPIPE 0x000000f0
+	if (IS_SVR_REV(svr, 1, 0))
+		clrbits_be32(&sec->mcfgr, MCFGR_AXIPIPE);
+#endif
+
 #ifdef CONFIG_SYS_FSL_ERRATUM_A005871
 	if (IS_SVR_REV(svr, 1, 0)) {
 		int i;
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index e1fc0f7..d748cb6 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -131,6 +131,7 @@
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 #define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
 #define CONFIG_SYS_FSL_ERRATUM_P1010_A003549
+#define CONFIG_SYS_FSL_ERRATUM_SEC_A003571
 #define CONFIG_SYS_FSL_ERRATUM_IFC_A003399
 
 /* P1011 is single core version of P1020 */
-- 
cgit v1.1


From e6394e9e8f83b77b61f0b240fcd39622571be690 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=D0=9D=D0=B8=D0=BA=D0=BE=D0=BB=D0=B0=D0=B9=20=D0=9F=D1=83?=
 =?UTF-8?q?=D0=B7=D0=B0=D0=BD=D0=BE=D0=B2?= <punzik@gmail.com>
Date: Wed, 19 Jun 2013 11:48:44 +0400
Subject: Fix for incorrect conversion hex string to number (FMAN firmware
 address).
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Николай Пузанов <punzik@gmail.com>
Acked-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/fdt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 63a04f1..533d47a 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -476,7 +476,7 @@ void fdt_fixup_fman_firmware(void *blob)
 	if (!p)
 		return;
 
-	fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 0);
+	fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 16);
 	if (!fmanfw)
 		return;
 
-- 
cgit v1.1