From 6e37a044076896ba88b0d6316fadd492032c5193 Mon Sep 17 00:00:00 2001
From: Timur Tabi <timur@freescale.com>
Date: Thu, 20 May 2010 12:45:39 -0500
Subject: fsl/85xx: add clkdvdr and pmuxcr2 to global utilities structure
 definition

Add the 'clkdvdr' and 'pmuxcr2' registers to the 85xx definition of
struct ccsr_gur.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/include/asm/immap_85xx.h | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index e7954e6..5b205d1 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1912,7 +1912,8 @@ typedef struct ccsr_gur {
 #define MPC85xx_PMUXCR_SD_DATA		0x80000000
 #define MPC85xx_PMUXCR_SDHC_CD		0x40000000
 #define MPC85xx_PMUXCR_SDHC_WP		0x20000000
-	u8	res6[12];
+	u32	pmuxcr2;	/* Alt. function signal multiplex control 2 */
+	u8	res6[8];
 	u32	devdisr;	/* Device disable control */
 #define MPC85xx_DEVDISR_PCI1		0x80000000
 #define MPC85xx_DEVDISR_PCI2		0x40000000
@@ -1949,10 +1950,12 @@ typedef struct ccsr_gur {
 #if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569)
 	u8	res10b[76];
 	par_io_t qe_par_io[7];
-	u8	res10c[3136];
+	u8	res10c[1600];
 #else
-	u8	res10b[3404];
+	u8	res10b[1868];
 #endif
+	u32	clkdvdr;	/* Clock Divide register */
+	u8	res10d[1532];
 	u32	clkocr;		/* Clock out select */
 	u8	res11[12];
 	u32	ddrdllcr;	/* DDR DLL control */
-- 
cgit v1.1


From 105438200744ca81199606a7b62c9eb07ac6efbd Mon Sep 17 00:00:00 2001
From: Anatolij Gustschin <agust@denx.de>
Date: Sat, 1 May 2010 22:21:09 +0200
Subject: video: cfb_console: add weak default video_set_lut()

Do not enforce drivers to provide empty video_set_lut()
if they do not implement indexed color (8 bpp) frame
buffer support. Add default function to the cfb_console
driver and remove empty video_set_lut() functions.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
 arch/powerpc/cpu/mpc512x/diu.c | 14 --------------
 1 file changed, 14 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc512x/diu.c b/arch/powerpc/cpu/mpc512x/diu.c
index f8d19a0..1cce6a2 100644
--- a/arch/powerpc/cpu/mpc512x/diu.c
+++ b/arch/powerpc/cpu/mpc512x/diu.c
@@ -179,18 +179,4 @@ void *video_hw_init(void)
 	return (void *)pGD;
 }
 
-/**
-  * Set the LUT
-  *
-  * @index: color number
-  * @r: red
-  * @b: blue
-  * @g: green
-  */
-void video_set_lut
-	(unsigned int index, unsigned char r, unsigned char g, unsigned char b)
-{
-	return;
-}
-
 #endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
-- 
cgit v1.1


From 460c2ce362e56890c2a029e2c3b1ff2796c7fc54 Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Mon, 21 Jun 2010 22:29:59 +0200
Subject: MPC5200: workaround data corruption for unaligned local bus accesses

The MPC5200 has a nasty problem that will cause silent data corruption
when performing unaligned 16 or 32 byte accesses when reading from the
local bus - typically this affects reading from flash. The problem can
be easily shown:

=> md fc0c0000 10
fc0c0000: 323e4337 01626f6f 74636d64 3d72756e    2>C7.bootcmd=run
fc0c0010: 206e6574 5f6e6673 00626f6f 7464656c     net_nfs.bootdel
fc0c0020: 61793d35 00626175 64726174 653d3131    ay=5.baudrate=11
fc0c0030: 35323030 00707265 626f6f74 3d656368    5200.preboot=ech
=> md fc0c0001 10
fc0c0001: 65636801 00000074 0000003d 00000020    ech....t...=...
fc0c0011: 0000005f 00000000 00000074 00000061    ..._.......t...a
fc0c0021: 00000000 00000064 00000065 00000035    .......d...e...5
fc0c0031: 00000000 00000062 0000003d 0000006f    .......b...=...o
=> md.w fc0c0001 10
fc0c0001: 0000 3701 0000 6f74 0000 643d 0000 6e20    ..7...ot..d=..n
fc0c0011: 0000 745f 0000 7300 0000 6f74 0000 6c61    ..t_..s...ot..la

This commit implements a workaround at least for the most blatant
problem: using memcpy() from NOR flash. We rename the assembler
routine into __memcpy() and provide a wrapper, which will use a
byte-wise copy loop for unaligned source or target addresses when
reading from NOR flash, and branch to the optimized __memcpy()
in all other cases, thus minimizing the performance impact.

Tested on lite5200b and TQM5200S.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
---
 arch/powerpc/cpu/mpc5xxx/Makefile         |  5 +++
 arch/powerpc/cpu/mpc5xxx/memcpy_mpc5200.c | 71 +++++++++++++++++++++++++++++++
 arch/powerpc/lib/Makefile                 |  5 +++
 3 files changed, 81 insertions(+)
 create mode 100644 arch/powerpc/cpu/mpc5xxx/memcpy_mpc5200.c

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc5xxx/Makefile b/arch/powerpc/cpu/mpc5xxx/Makefile
index 0ee0611..4ab2b7b 100644
--- a/arch/powerpc/cpu/mpc5xxx/Makefile
+++ b/arch/powerpc/cpu/mpc5xxx/Makefile
@@ -30,6 +30,11 @@ SOBJS	= io.o firmware_sc_task_bestcomm.impl.o
 COBJS	= i2c.o traps.o cpu.o cpu_init.o ide.o interrupts.o \
 	  loadtask.o pci_mpc5200.o serial.o speed.o usb_ohci.o usb.o
 
+# Workaround for local bus unaligned access problem on MPC5200
+#ifdef CONFIG_MPC5200
+COBJS	+= memcpy_mpc5200.o
+#endif
+
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
 START	:= $(addprefix $(obj),$(START))
diff --git a/arch/powerpc/cpu/mpc5xxx/memcpy_mpc5200.c b/arch/powerpc/cpu/mpc5xxx/memcpy_mpc5200.c
new file mode 100644
index 0000000..0950354
--- /dev/null
+++ b/arch/powerpc/cpu/mpc5xxx/memcpy_mpc5200.c
@@ -0,0 +1,71 @@
+/*
+ * (C) Copyright 2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This is a workaround for issues on the MPC5200, where unaligned
+ * 32-bit-accesses to the local bus will deliver corrupted data. This
+ * happens for example when trying to use memcpy() from an odd NOR
+ * flash address; the behaviour can be also seen when using "md" on an
+ * odd NOR flash address (but there it is not a bug in U-Boot, which
+ * only shows the behaviour of this processor).
+ *
+ * For memcpy(), we test if either the source or the target address
+ * are not 32 bit aligned, and - if so - if the source address is in
+ * NOR flash: in this case we perform a byte-wise (slow) then; for
+ * aligned operations of non-flash areas we use the optimized (fast)
+ * real __memcpy().  This way we minimize the performance impact of
+ * this workaround.
+ *
+ */
+
+#include <common.h>
+#include <flash.h>
+#include <linux/types.h>
+
+void *memcpy(void *trg, const void *src, size_t len)
+{
+	extern void* __memcpy(void *, const void *, size_t);
+	char *s = (char *)src;
+	char *t = (char *)trg;
+	void *dest = (void *)src;
+
+	/*
+	 * Check is source address is in flash:
+	 * If not, we use the fast assembler code
+	 */
+	if (((((unsigned long)s & 3) == 0)	/* source aligned  */
+		&&				/*	AND	   */
+	     (((unsigned long)t & 3) == 0))	/* target aligned, */
+		||				/*	or	   */
+	    (addr2info((ulong)s) == NULL)) {	/* source not in flash */
+		return __memcpy(trg, src, len);
+	}
+
+	/*
+	 * Copying from flash, perform byte by byte copy.
+	 */
+	while (len-- > 0)
+		*t++ = *s++;
+
+	return dest;
+}
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 5f85502..bf23790 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -43,6 +43,11 @@ COBJS-y	+= time.o
 SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
 
+# Workaround for local bus unaligned access problem on MPC5200
+ifdef CONFIG_MPC5200
+$(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
+endif
+
 $(LIB):	$(obj).depend $(OBJS)
 	@if ! $(CROSS_COMPILE)readelf -S $(OBJS) | grep -q '\.fixup.*PROGBITS';\
 	then \
-- 
cgit v1.1


From ee80fa7b6e96a43d4270700cddc884e00cdd99fd Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Sun, 13 Jun 2010 18:38:23 +0200
Subject: Get rid of bogus CONFIG_SYS_BUS_HZ and CONFIG_SYS_CONFIG_BUS_CLK
 definitions

CONFIG_SYS_BUS_HZ has not really been used anywhere except to be
redined as CONFIG_SYS_BUS_CLK; in addition, the mpc7448hpc2 had the
bogus CONFIG_SYS_CONFIG_BUS_CLK setting which duplicated the
funtionality.  Change all this to use CONFIG_SYS_BUS_CLK consistently.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Eran Man <eran@nbase.co.il>
Cc: Stefan Roese <sr@denx.de>
Cc: Nye Liu <nyet@zumanetworks.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>
---
 arch/powerpc/cpu/74xx_7xx/cpu.c | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/74xx_7xx/cpu.c b/arch/powerpc/cpu/74xx_7xx/cpu.c
index 3c17277..9248702 100644
--- a/arch/powerpc/cpu/74xx_7xx/cpu.c
+++ b/arch/powerpc/cpu/74xx_7xx/cpu.c
@@ -277,19 +277,17 @@ do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 /*
  * For the 7400 the TB clock runs at 1/4 the cpu bus speed.
  */
-#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SYS_CONFIG_BUS_CLK)
+#if defined(CONFIG_AMIGAONEG3SE) || !defined(CONFIG_SYS_BUS_CLK)
+#define	CONFIG_SYS_BUS_CLK gd->bus_clk
+#endif
+
 unsigned long get_tbclk(void)
 {
-	return (gd->bus_clk / 4);
+	return CONFIG_SYS_BUS_CLK / 4;
 }
-#else	/* ! CONFIG_AMIGAONEG3SE and !CONFIG_SYS_CONFIG_BUS_CLK*/
 
-unsigned long get_tbclk (void)
-{
-	return CONFIG_SYS_BUS_HZ / 4;
-}
-#endif	/* CONFIG_AMIGAONEG3SE or CONFIG_SYS_CONFIG_BUS_CLK*/
 /* ------------------------------------------------------------------------- */
+
 #if defined(CONFIG_WATCHDOG)
 #if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx)
 void
-- 
cgit v1.1


From 953b7e629198fe2eb0adf272fb9140f2a4a51826 Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Sun, 13 Jun 2010 18:28:54 +0200
Subject: Remove AmigaOneG3SE board

The AmigaOneG3SE board has been orphaned or a very long time, and
broken for more than 12 releases resp. more than 3 years.  As nobody
seems to be interested any more in this stuff we may as well ged rid
of it, especially as it clutters many areas of the code so it is a
continuous pain for all kinds of ongoing work.

Signed-off-by: Wolfgang Denk <wd@denx.de>
---
 arch/powerpc/cpu/74xx_7xx/cpu.c        |  7 +------
 arch/powerpc/cpu/74xx_7xx/interrupts.c | 11 +++++------
 arch/powerpc/cpu/74xx_7xx/speed.c      |  4 ----
 arch/powerpc/cpu/74xx_7xx/start.S      |  5 ++---
 arch/powerpc/cpu/74xx_7xx/traps.c      |  8 --------
 5 files changed, 8 insertions(+), 27 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/74xx_7xx/cpu.c b/arch/powerpc/cpu/74xx_7xx/cpu.c
index 9248702..14d3ce4 100644
--- a/arch/powerpc/cpu/74xx_7xx/cpu.c
+++ b/arch/powerpc/cpu/74xx_7xx/cpu.c
@@ -49,11 +49,6 @@
 #include <fdt_support.h>
 #endif
 
-#ifdef CONFIG_AMIGAONEG3SE
-#include "../board/MAI/AmigaOneG3SE/via686.h"
-#include "../board/MAI/AmigaOneG3SE/memio.h"
-#endif
-
 DECLARE_GLOBAL_DATA_PTR;
 
 cpu_t
@@ -277,7 +272,7 @@ do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 /*
  * For the 7400 the TB clock runs at 1/4 the cpu bus speed.
  */
-#if defined(CONFIG_AMIGAONEG3SE) || !defined(CONFIG_SYS_BUS_CLK)
+#ifndef CONFIG_SYS_BUS_CLK
 #define	CONFIG_SYS_BUS_CLK gd->bus_clk
 #endif
 
diff --git a/arch/powerpc/cpu/74xx_7xx/interrupts.c b/arch/powerpc/cpu/74xx_7xx/interrupts.c
index 0ea1aec..c2856c9 100644
--- a/arch/powerpc/cpu/74xx_7xx/interrupts.c
+++ b/arch/powerpc/cpu/74xx_7xx/interrupts.c
@@ -34,20 +34,19 @@
 
 int interrupt_init_cpu (unsigned *decrementer_count)
 {
-#if defined(DEBUG) && !defined(CONFIG_AMIGAONEG3SE)
-	printf("interrupt_init: GT main cause reg: %08x:%08x\n",
+	debug("interrupt_init: GT main cause reg: %08x:%08x\n",
 	       GTREGREAD(LOW_INTERRUPT_CAUSE_REGISTER),
 	       GTREGREAD(HIGH_INTERRUPT_CAUSE_REGISTER));
-	printf("interrupt_init: ethernet cause regs: %08x %08x %08x\n",
+	debug("interrupt_init: ethernet cause regs: %08x %08x %08x\n",
 	       GTREGREAD(ETHERNET0_INTERRUPT_CAUSE_REGISTER),
 	       GTREGREAD(ETHERNET1_INTERRUPT_CAUSE_REGISTER),
 	       GTREGREAD(ETHERNET2_INTERRUPT_CAUSE_REGISTER));
-	printf("interrupt_init: ethernet mask regs:  %08x %08x %08x\n",
+	debug("interrupt_init: ethernet mask regs:  %08x %08x %08x\n",
 	       GTREGREAD(ETHERNET0_INTERRUPT_MASK_REGISTER),
 	       GTREGREAD(ETHERNET1_INTERRUPT_MASK_REGISTER),
 	       GTREGREAD(ETHERNET2_INTERRUPT_MASK_REGISTER));
-	puts("interrupt_init: setting decrementer_count\n");
-#endif
+	debug("interrupt_init: setting decrementer_count\n");
+
 	*decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
 
 	return (0);
diff --git a/arch/powerpc/cpu/74xx_7xx/speed.c b/arch/powerpc/cpu/74xx_7xx/speed.c
index f2fdcd5..6450c3c 100644
--- a/arch/powerpc/cpu/74xx_7xx/speed.c
+++ b/arch/powerpc/cpu/74xx_7xx/speed.c
@@ -25,10 +25,6 @@
 #include <74xx_7xx.h>
 #include <asm/processor.h>
 
-#ifdef CONFIG_AMIGAONEG3SE
-#include "../board/MAI/AmigaOneG3SE/via686.h"
-#endif
-
 DECLARE_GLOBAL_DATA_PTR;
 
 extern unsigned long get_board_bus_clk (void);
diff --git a/arch/powerpc/cpu/74xx_7xx/start.S b/arch/powerpc/cpu/74xx_7xx/start.S
index 88fdf88..a36af5a 100644
--- a/arch/powerpc/cpu/74xx_7xx/start.S
+++ b/arch/powerpc/cpu/74xx_7xx/start.S
@@ -745,9 +745,8 @@ in_ram:
 	bne	5b
 6:
 	mr	r3, r10		/* Destination Address		*/
-#if defined(CONFIG_AMIGAONEG3SE) || \
-    defined(CONFIG_DB64360)	 || \
-    defined(CONFIG_DB64460)      || \
+#if defined(CONFIG_DB64360)	|| \
+    defined(CONFIG_DB64460)     || \
     defined(CONFIG_CPCI750)	|| \
     defined(CONFIG_PPMC7XX)     || \
     defined(CONFIG_P3Mx)
diff --git a/arch/powerpc/cpu/74xx_7xx/traps.c b/arch/powerpc/cpu/74xx_7xx/traps.c
index 5073b05..7ae81eb 100644
--- a/arch/powerpc/cpu/74xx_7xx/traps.c
+++ b/arch/powerpc/cpu/74xx_7xx/traps.c
@@ -37,20 +37,12 @@
 #include <kgdb.h>
 #include <asm/processor.h>
 
-#ifdef CONFIG_AMIGAONEG3SE
-DECLARE_GLOBAL_DATA_PTR;
-#endif
-
 /* Returns 0 if exception not found and fixup otherwise.  */
 extern unsigned long search_exception_table(unsigned long);
 
 /* THIS NEEDS CHANGING to use the board info structure.
 */
-#ifdef CONFIG_AMIGAONEG3SE
-#define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize)
-#else
 #define END_OF_MEM	0x02000000
-#endif
 
 /*
  * Trap & Exception support
-- 
cgit v1.1


From 4ccd5510e50b5675227a1fe0e5ca099d333f637d Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Tue, 29 Jun 2010 01:33:35 +0200
Subject: MPC512x: workaround data corruption for unaligned local bus accesses

Commit 460c2ce3 "MPC5200: workaround data corruption for unaligned
local bus accesses" fixed the problem for MPC5200 only, but MPC512x is
affected as well, so apply the same fix here, too.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
---
 arch/powerpc/cpu/mpc5xxx/Makefile         |  5 ---
 arch/powerpc/cpu/mpc5xxx/memcpy_mpc5200.c | 71 -------------------------------
 arch/powerpc/lib/Makefile                 | 16 +++++--
 arch/powerpc/lib/memcpy_mpc5200.c         | 71 +++++++++++++++++++++++++++++++
 4 files changed, 83 insertions(+), 80 deletions(-)
 delete mode 100644 arch/powerpc/cpu/mpc5xxx/memcpy_mpc5200.c
 create mode 100644 arch/powerpc/lib/memcpy_mpc5200.c

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/mpc5xxx/Makefile b/arch/powerpc/cpu/mpc5xxx/Makefile
index 4ab2b7b..0ee0611 100644
--- a/arch/powerpc/cpu/mpc5xxx/Makefile
+++ b/arch/powerpc/cpu/mpc5xxx/Makefile
@@ -30,11 +30,6 @@ SOBJS	= io.o firmware_sc_task_bestcomm.impl.o
 COBJS	= i2c.o traps.o cpu.o cpu_init.o ide.o interrupts.o \
 	  loadtask.o pci_mpc5200.o serial.o speed.o usb_ohci.o usb.o
 
-# Workaround for local bus unaligned access problem on MPC5200
-#ifdef CONFIG_MPC5200
-COBJS	+= memcpy_mpc5200.o
-#endif
-
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
 START	:= $(addprefix $(obj),$(START))
diff --git a/arch/powerpc/cpu/mpc5xxx/memcpy_mpc5200.c b/arch/powerpc/cpu/mpc5xxx/memcpy_mpc5200.c
deleted file mode 100644
index 0950354..0000000
--- a/arch/powerpc/cpu/mpc5xxx/memcpy_mpc5200.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * (C) Copyright 2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * This is a workaround for issues on the MPC5200, where unaligned
- * 32-bit-accesses to the local bus will deliver corrupted data. This
- * happens for example when trying to use memcpy() from an odd NOR
- * flash address; the behaviour can be also seen when using "md" on an
- * odd NOR flash address (but there it is not a bug in U-Boot, which
- * only shows the behaviour of this processor).
- *
- * For memcpy(), we test if either the source or the target address
- * are not 32 bit aligned, and - if so - if the source address is in
- * NOR flash: in this case we perform a byte-wise (slow) then; for
- * aligned operations of non-flash areas we use the optimized (fast)
- * real __memcpy().  This way we minimize the performance impact of
- * this workaround.
- *
- */
-
-#include <common.h>
-#include <flash.h>
-#include <linux/types.h>
-
-void *memcpy(void *trg, const void *src, size_t len)
-{
-	extern void* __memcpy(void *, const void *, size_t);
-	char *s = (char *)src;
-	char *t = (char *)trg;
-	void *dest = (void *)src;
-
-	/*
-	 * Check is source address is in flash:
-	 * If not, we use the fast assembler code
-	 */
-	if (((((unsigned long)s & 3) == 0)	/* source aligned  */
-		&&				/*	AND	   */
-	     (((unsigned long)t & 3) == 0))	/* target aligned, */
-		||				/*	or	   */
-	    (addr2info((ulong)s) == NULL)) {	/* source not in flash */
-		return __memcpy(trg, src, len);
-	}
-
-	/*
-	 * Copying from flash, perform byte by byte copy.
-	 */
-	while (len-- > 0)
-		*t++ = *s++;
-
-	return dest;
-}
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index bf23790..2065b6d 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -40,14 +40,22 @@ COBJS-y	+= interrupts.o
 COBJS-$(CONFIG_CMD_KGDB) += kgdb.o
 COBJS-y	+= time.o
 
-SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-# Workaround for local bus unaligned access problem on MPC5200
+# Workaround for local bus unaligned access problems
+# on MPC512x and MPC5200
+ifdef CONFIG_MPC512X
+$(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
+COBJS-y += memcpy_mpc5200.o
+endif
 ifdef CONFIG_MPC5200
 $(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
+COBJS-y += memcpy_mpc5200.o
 endif
 
+COBJS	+= $(sort $(COBJS-y))
+
+SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
+
 $(LIB):	$(obj).depend $(OBJS)
 	@if ! $(CROSS_COMPILE)readelf -S $(OBJS) | grep -q '\.fixup.*PROGBITS';\
 	then \
diff --git a/arch/powerpc/lib/memcpy_mpc5200.c b/arch/powerpc/lib/memcpy_mpc5200.c
new file mode 100644
index 0000000..0950354
--- /dev/null
+++ b/arch/powerpc/lib/memcpy_mpc5200.c
@@ -0,0 +1,71 @@
+/*
+ * (C) Copyright 2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This is a workaround for issues on the MPC5200, where unaligned
+ * 32-bit-accesses to the local bus will deliver corrupted data. This
+ * happens for example when trying to use memcpy() from an odd NOR
+ * flash address; the behaviour can be also seen when using "md" on an
+ * odd NOR flash address (but there it is not a bug in U-Boot, which
+ * only shows the behaviour of this processor).
+ *
+ * For memcpy(), we test if either the source or the target address
+ * are not 32 bit aligned, and - if so - if the source address is in
+ * NOR flash: in this case we perform a byte-wise (slow) then; for
+ * aligned operations of non-flash areas we use the optimized (fast)
+ * real __memcpy().  This way we minimize the performance impact of
+ * this workaround.
+ *
+ */
+
+#include <common.h>
+#include <flash.h>
+#include <linux/types.h>
+
+void *memcpy(void *trg, const void *src, size_t len)
+{
+	extern void* __memcpy(void *, const void *, size_t);
+	char *s = (char *)src;
+	char *t = (char *)trg;
+	void *dest = (void *)src;
+
+	/*
+	 * Check is source address is in flash:
+	 * If not, we use the fast assembler code
+	 */
+	if (((((unsigned long)s & 3) == 0)	/* source aligned  */
+		&&				/*	AND	   */
+	     (((unsigned long)t & 3) == 0))	/* target aligned, */
+		||				/*	or	   */
+	    (addr2info((ulong)s) == NULL)) {	/* source not in flash */
+		return __memcpy(trg, src, len);
+	}
+
+	/*
+	 * Copying from flash, perform byte by byte copy.
+	 */
+	while (len-- > 0)
+		*t++ = *s++;
+
+	return dest;
+}
-- 
cgit v1.1


From 955ea6fc2749a4305395758fc797cf8c11dcbed7 Mon Sep 17 00:00:00 2001
From: Michael Weiss <michael.weiss@ifm.com>
Date: Thu, 20 May 2010 16:09:34 +0200
Subject: powerpc/bootcount: Add bootcount support for MPC512x

This also uses the breadcrumb register as on MPC5200.

Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
---
 arch/powerpc/lib/bootcount.c | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/lib/bootcount.c b/arch/powerpc/lib/bootcount.c
index 338c848..07ef28d 100644
--- a/arch/powerpc/lib/bootcount.c
+++ b/arch/powerpc/lib/bootcount.c
@@ -35,6 +35,11 @@
 #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
 #endif /* defined(CONFIG_MPC5xxx) */
 
+#if defined(CONFIG_MPC512X)
+#define CONFIG_SYS_BOOTCOUNT_ADDR	(&((immap_t *)CONFIG_SYS_IMMR)->clk.bcr)
+#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
+#endif /* defined(CONFIG_MPC512X) */
+
 #if defined(CONFIG_8xx)
 #define CONFIG_SYS_BOOTCOUNT_ADDR (((immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + \
 				CPM_BOOTCOUNT_ADDR)
-- 
cgit v1.1


From fe7cca715c69f66efdc9c64462b0fd0a445331a5 Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Wed, 19 May 2010 11:13:24 +0200
Subject: ppc4xx: Enable booting with Option E on 460EX/EXr/GT

This patch enables booting with option E on the PPC460EX/EXr/GT.
When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0.
The Software Boot Configuration Procedure is needed to engage the
PLL and perform a chip reset.

Signed-off-by: Stefan Roese <sr@denx.de>
---
 arch/powerpc/cpu/ppc4xx/cpu_init.c | 49 ++++++++++++++++++++++++++++++--------
 1 file changed, 39 insertions(+), 10 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index 8a6e545..c04eede 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -36,6 +36,26 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CONFIG_SYS_PLL_RECONFIG	0
 #endif
 
+#if defined(CONFIG_440EPX) || \
+    defined(CONFIG_460EX) || defined(CONFIG_460GT)
+static void reset_with_rli(void)
+{
+	u32 reg;
+
+	/*
+	 * Set reload inhibit so configuration will persist across
+	 * processor resets
+	 */
+	mfcpr(CPR0_ICFG, reg);
+	reg |= CPR0_ICFG_RLI_MASK;
+	mtcpr(CPR0_ICFG, reg);
+
+	/* Reset processor if configuration changed */
+	__asm__ __volatile__ ("sync; isync");
+	mtspr(SPRN_DBCR0, 0x20000000);
+}
+#endif
+
 void reconfigure_pll(u32 new_cpu_freq)
 {
 #if defined(CONFIG_440EPX)
@@ -166,19 +186,28 @@ void reconfigure_pll(u32 new_cpu_freq)
 		}
 	}
 
-	if (reset_needed) {
+	/* Now reset the CPU if needed */
+	if (reset_needed)
+		reset_with_rli();
+#endif
+
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+	u32 reg;
+
+	/*
+	 * See "9.2.1.1 Booting with Option E" in the 460EX/GT
+	 * users manual
+	 */
+	mfcpr(CPR0_PLLC, reg);
+	if ((reg & (CPR0_PLLC_RST | CPR0_PLLC_ENG)) == CPR0_PLLC_RST) {
 		/*
-		 * Set reload inhibit so configuration will persist across
-		 * processor resets
+		 * Set engage bit
 		 */
-		mfcpr(CPR0_ICFG, reg);
-		reg &= ~CPR0_ICFG_RLI_MASK;
-		reg |= 1 << 31;
-		mtcpr(CPR0_ICFG, reg);
+		reg = (reg & ~CPR0_PLLC_RST) | CPR0_PLLC_ENG;
+		mtcpr(CPR0_PLLC, reg);
 
-		/* Reset processor if configuration changed */
-		__asm__ __volatile__ ("sync; isync");
-		mtspr(SPRN_DBCR0, 0x20000000);
+		/* Now reset the CPU */
+		reset_with_rli();
 	}
 #endif
 }
-- 
cgit v1.1


From db643773fcea431c9dcc7f2bdb3bc337d2b268b4 Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Fri, 21 May 2010 15:06:19 +0200
Subject: ppc4xx: Enable PCIe support without PCI support on PPC440/460

By not defining CONFIG_SYS_PCI_MASTER_INIT and CONFIG_SYS_PCI_TARGET_INIT,
PCI support (host and adapter) will not be enabled. But it's still
possible to use the U-Boot PCI infrastructure for the PCIe ports.

This configuration option is needed for a new 460GT board, which uses
PCIe but has PCI disabled.

Signed-off-by: Stefan Roese <sr@denx.de>
---
 arch/powerpc/cpu/ppc4xx/4xx_pci.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/ppc4xx/4xx_pci.c b/arch/powerpc/cpu/ppc4xx/4xx_pci.c
index eed4534..bfba952 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_pci.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_pci.c
@@ -476,7 +476,9 @@ void pci_init_board(void)
  *-----------------------------------------------------------------------------*/
 #if defined(CONFIG_440)
 
+#if defined(CONFIG_SYS_PCI_MASTER_INIT) || defined(CONFIG_SYS_PCI_TARGET_INIT)
 static struct pci_controller ppc440_hose = {0};
+#endif
 
 /*
  * This routine is called to determine if a pci scan should be
@@ -704,6 +706,7 @@ void pci_master_init(struct pci_controller *hose)
 	__attribute__((weak, alias("__pci_master_init")));
 #endif /* CONFIG_SYS_PCI_MASTER_INIT */
 
+#if defined(CONFIG_SYS_PCI_MASTER_INIT) || defined(CONFIG_SYS_PCI_TARGET_INIT)
 int pci_440_init (struct pci_controller *hose)
 {
 	int reg_num = 0;
@@ -845,12 +848,19 @@ int pci_440_init (struct pci_controller *hose)
 	}
 	return hose->last_busno;
 }
+#endif
 
 void pci_init_board(void)
 {
-	int busno;
+	int busno = 0;
 
+	/*
+	 * Only init PCI when either master or target functionality
+	 * is selected.
+	 */
+#if defined(CONFIG_SYS_PCI_MASTER_INIT) || defined(CONFIG_SYS_PCI_TARGET_INIT)
 	busno = pci_440_init (&ppc440_hose);
+#endif
 #if (defined(CONFIG_440SPE) || \
     defined(CONFIG_460EX) || defined(CONFIG_460GT)) && \
     !defined(CONFIG_PCI_DISABLE_PCIE)
-- 
cgit v1.1


From 066003b2c5540bde3c29ac6f8a4fbde24dd0b2f0 Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Tue, 25 May 2010 15:23:07 +0200
Subject: ppc4xx: Enable overwriting of default scan window for IBM DDR2
 controller

This patch makes it possible to overwrite the default auto-calibration
scan window (SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR] values) with
board specific values. The parameters of the weak default function are
corrected as well. This way we don't need the casts any more.

This feature will be used by an upcoming PPC460GT board port.

Signed-off-by: Stefan Roese <sr@denx.de>
---
 arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c | 17 +++++------------
 arch/powerpc/include/asm/ppc4xx-sdram.h          |  5 +++++
 2 files changed, 10 insertions(+), 12 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
index aed0ed7..0f69ef9 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
@@ -83,11 +83,6 @@ struct ddrautocal {
 	u32 flags;
 };
 
-struct sdram_timing {
-	u32 wrdtr;
-	u32 clktr;
-};
-
 struct sdram_timing_clks {
 	u32 wrdtr;
 	u32 clktr;
@@ -145,11 +140,12 @@ void
 spd_ddr_init_hang(void) __attribute__((weak, alias("__spd_ddr_init_hang")));
 #endif /* defined(CONFIG_SPD_EEPROM) */
 
-ulong __ddr_scan_option(ulong default_val)
+struct sdram_timing *__ddr_scan_option(struct sdram_timing *default_val)
 {
 	return default_val;
 }
-ulong ddr_scan_option(ulong) __attribute__((weak, alias("__ddr_scan_option")));
+struct sdram_timing *ddr_scan_option(struct sdram_timing *)
+	__attribute__((weak, alias("__ddr_scan_option")));
 
 u32 __ddr_rdss_opt(u32 default_val)
 {
@@ -931,7 +927,7 @@ static u32 DQS_calibration_methodB(struct ddrautocal *cal)
  * known working {SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR]} value
  * pairs via a board defined ddr_scan_option() function.
  */
-struct sdram_timing full_scan_options[] = {
+static struct sdram_timing full_scan_options[] = {
 	{0, 0}, {0, 1}, {0, 2}, {0, 3},
 	{1, 0}, {1, 1}, {1, 2}, {1, 3},
 	{2, 0}, {2, 1}, {2, 2}, {2, 3},
@@ -970,10 +966,7 @@ u32 DQS_autocalibration(void)
 
 	memset(&tcal, 0, sizeof(tcal));
 
-	ddr_scan_option((ulong)full_scan_options);
-
-	scan_list =
-	      (struct sdram_timing *)ddr_scan_option((ulong)full_scan_options);
+	scan_list = ddr_scan_option(full_scan_options);
 
 	mfsdram(SDRAM_MCOPT1, val);
 	if ((val & SDRAM_MCOPT1_MCHK_CHK_REP) == SDRAM_MCOPT1_MCHK_CHK_REP)
diff --git a/arch/powerpc/include/asm/ppc4xx-sdram.h b/arch/powerpc/include/asm/ppc4xx-sdram.h
index 92be514..66cf509 100644
--- a/arch/powerpc/include/asm/ppc4xx-sdram.h
+++ b/arch/powerpc/include/asm/ppc4xx-sdram.h
@@ -1394,6 +1394,11 @@
 #endif /* CONFIG_SDRAM_PPC4xx_DENALI_DDR2 */
 
 #ifndef __ASSEMBLY__
+struct sdram_timing {
+	u32 wrdtr;
+	u32 clktr;
+};
+
 /*
  * Prototypes
  */
-- 
cgit v1.1


From e9c020df9608c58ccd35a000bceadbb91ffe5f23 Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Tue, 25 May 2010 15:33:14 +0200
Subject: ppc4xx: DDR2: Complete RDSS configuration on non-SPD based boards

As described in item #10 of the SDRAM initialization (chapter 22.2.9
of the PPC460EX/EXr/GT users manual), RDSS may need to be adjusted. The
code for this is now factored out and executed for non-SPD based boards
as well.

Signed-off-by: Stefan Roese <sr@denx.de>
---
 arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c | 52 +++++++++++++++++++++++++---------
 1 file changed, 38 insertions(+), 14 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
index faddee9..b2cc2fe 100644
--- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
@@ -68,6 +68,31 @@
 		       "SDRAM_" #mnemonic, SDRAM_##mnemonic, data);	\
 	} while (0)
 
+#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
+static void update_rdcc(void)
+{
+	u32 val;
+
+	/*
+	 * Complete RDSS configuration as mentioned on page 7 of the AMCC
+	 * PowerPC440SP/SPe DDR2 application note:
+	 * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
+	 *
+	 * Or item #10 "10. Complete RDSS configuration" in chapter
+	 * "22.2.9 SDRAM Initialization" of AMCC PPC460EX/EXr/GT users
+	 * manual.
+	 */
+	mfsdram(SDRAM_RTSR, val);
+	if ((val & SDRAM_RTSR_TRK1SM_MASK) == SDRAM_RTSR_TRK1SM_ATPLS1) {
+		mfsdram(SDRAM_RDCC, val);
+		if ((val & SDRAM_RDCC_RDSS_MASK) != SDRAM_RDCC_RDSS_T4) {
+			val += 0x40000000;
+			mtsdram(SDRAM_RDCC, val);
+		}
+	}
+}
+#endif
+
 #if defined(CONFIG_440)
 /*
  * This DDR2 setup code can dynamically setup the TLB entries for the DDR2
@@ -620,6 +645,12 @@ phys_size_t initdram(int board_type)
 #else
 	program_DQS_calibration(dimm_populated, iic0_dimm_addr, num_dimm_banks);
 #endif
+	/*
+	 * Now complete RDSS configuration as mentioned on page 7 of the AMCC
+	 * PowerPC440SP/SPe DDR2 application note:
+	 * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
+	 */
+	update_rdcc();
 
 #ifdef CONFIG_DDR_ECC
 	/*------------------------------------------------------------------
@@ -2692,20 +2723,6 @@ calibration_loop:
 	blank_string(strlen(str));
 #endif /* CONFIG_DDR_RQDC_FIXED */
 
-	/*
-	 * Now complete RDSS configuration as mentioned on page 7 of the AMCC
-	 * PowerPC440SP/SPe DDR2 application note:
-	 * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
-	 */
-	mfsdram(SDRAM_RTSR, val);
-	if ((val & SDRAM_RTSR_TRK1SM_MASK) == SDRAM_RTSR_TRK1SM_ATPLS1) {
-		mfsdram(SDRAM_RDCC, val);
-		if ((val & SDRAM_RDCC_RDSS_MASK) != SDRAM_RDCC_RDSS_T4) {
-			val += 0x40000000;
-			mtsdram(SDRAM_RDCC, val);
-		}
-	}
-
 	mfsdram(SDRAM_DLCR, val);
 	debug("%s[%d] DLCR: 0x%08lX\n", __FUNCTION__, __LINE__, val);
 	mfsdram(SDRAM_RQDC, val);
@@ -3007,6 +3024,13 @@ phys_size_t initdram(int board_type)
 #endif /* !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) */
 #endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */
 
+	/*
+	 * Now complete RDSS configuration as mentioned on page 7 of the AMCC
+	 * PowerPC440SP/SPe DDR2 application note:
+	 * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
+	 */
+	update_rdcc();
+
 #if defined(CONFIG_DDR_ECC)
 	do_program_ecc(0);
 #endif /* defined(CONFIG_DDR_ECC) */
-- 
cgit v1.1


From 2909ac03f4125c25903c2ac69a6ef0f6e807a53d Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Tue, 25 May 2010 16:13:41 +0200
Subject: ppc4xx: Add DDR1/2 macros in ppc4xx-sdram.h for non-405EX as well

This patch adds some DDR(2) macros to all PPC4xx's equipped with
this IBM DDR1/2 controller.

Signed-off-by: Stefan Roese <sr@denx.de>
---
 arch/powerpc/include/asm/ppc4xx-sdram.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/include/asm/ppc4xx-sdram.h b/arch/powerpc/include/asm/ppc4xx-sdram.h
index 66cf509..d9506e2 100644
--- a/arch/powerpc/include/asm/ppc4xx-sdram.h
+++ b/arch/powerpc/include/asm/ppc4xx-sdram.h
@@ -344,6 +344,9 @@
 #define SDRAM_RXBAS_SDSZ_2048		SDRAM_RXBAS_SDSZ_2048MB
 #define SDRAM_RXBAS_SDSZ_4096		SDRAM_RXBAS_SDSZ_4096MB
 #define SDRAM_RXBAS_SDSZ_8192		SDRAM_RXBAS_SDSZ_8192MB
+#endif /* CONFIG_405EX */
+
+/* The mode definitions are the same for all PPC4xx variants */
 #define SDRAM_RXBAS_SDAM_MODE0		PPC_REG_VAL(23, 0x0)
 #define SDRAM_RXBAS_SDAM_MODE1		PPC_REG_VAL(23, 0x1)
 #define SDRAM_RXBAS_SDAM_MODE2		PPC_REG_VAL(23, 0x2)
@@ -356,7 +359,6 @@
 #define SDRAM_RXBAS_SDAM_MODE9		PPC_REG_VAL(23, 0x9)
 #define SDRAM_RXBAS_SDBE_DISABLE	PPC_REG_VAL(31, 0x0)
 #define SDRAM_RXBAS_SDBE_ENABLE		PPC_REG_VAL(31, 0x1)
-#endif /* CONFIG_405EX */
 
 /*
  * Memory controller registers
-- 
cgit v1.1


From 4978e6058440b6dc8f8f7498288c06291ba54b13 Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Thu, 27 May 2010 16:45:20 +0200
Subject: ppc4xx: Cleanup Boot/FLASH TLB reassignment for PPC440/460

Background Info:
Some PPC440/460 boards have caches enabled in the Boot/FLASH TLB (via
init.S) to speed up the boot process. In relocate_code (start.S) the
cache inhibit attribute for this TLB is set to disable cache. This is
needed for the CFI FLASH driver.

This patch now cleans this code up:
- CONFIG_SYS_TLB_FOR_BOOT_FLASH is defined to 0 (default TLB) if not
  defined in the top of this file. This way, we can remove an ugly
  #ifdef in this code.
- Replace complex "#if defined(CONFIG_440EP) || defined(CONFIG_GR)..."
  statement with "#if defined(CONFIG_440)".
- Remove unnecessary cache invalidate calls resulting in faster bootup.

Signed-off-by: Stefan Roese <sr@denx.de>
---
 arch/powerpc/cpu/ppc4xx/start.S | 21 ++++++---------------
 1 file changed, 6 insertions(+), 15 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index c739deb..5296dad 100644
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -207,6 +207,10 @@
 		(0x00000000)
 #endif /* !defined(CONFIG_SYS_DCACHE_SACR_VALUE) */
 
+#if !defined(CONFIG_SYS_TLB_FOR_BOOT_FLASH)
+#define CONFIG_SYS_TLB_FOR_BOOT_FLASH	0	/* use TLB 0 as default */
+#endif
+
 #define function_prolog(func_name)	.text; \
 					.align 2; \
 					.globl func_name; \
@@ -1457,34 +1461,21 @@ relocate_code:
 	isync
 #endif /* CONFIG_SYS_INIT_RAM_DCACHE */
 
-#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
-    defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
-    defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
-    defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-    defined(CONFIG_460SX)
 	/*
 	 * On some 440er platforms the cache is enabled in the first TLB (Boot-CS)
 	 * to speed up the boot process. Now this cache needs to be disabled.
 	 */
-	iccci	0,0			/* Invalidate inst cache */
-	dccci	0,0			/* Invalidate data cache, now no longer our stack */
-	sync
-	isync
-
+#if defined(CONFIG_440)
 	/* Clear all potential pending exceptions */
 	mfspr	r1,SPRN_MCSR
 	mtspr	SPRN_MCSR,r1
-#ifdef CONFIG_SYS_TLB_FOR_BOOT_FLASH
 	addi	r1,r0,CONFIG_SYS_TLB_FOR_BOOT_FLASH	/* Use defined TLB */
-#else
-	addi	r1,r0,0x0000		/* Default TLB entry is #0 */
-#endif /* CONFIG_SYS_TLB_FOR_BOOT_FLASH */
 	tlbre	r0,r1,0x0002		/* Read contents */
 	ori	r0,r0,0x0c00		/* Or in the inhibit, write through bit */
 	tlbwe	r0,r1,0x0002		/* Save it out */
 	sync
 	isync
-#endif /* defined(CONFIG_440EP) || ... || defined(CONFIG_460GT) */
+#endif /* defined(CONFIG_440) */
 	mr	r1,  r3		/* Set new stack pointer		*/
 	mr	r9,  r4		/* Save copy of Init Data pointer	*/
 	mr	r10, r5		/* Save copy of Destination Address	*/
-- 
cgit v1.1


From 54841ab50c20d6fa6c9cc3eb826989da3a22d934 Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Mon, 28 Jun 2010 22:00:46 +0200
Subject: Make sure that argv[] argument pointers are not modified.

The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands.  Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".

This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:

int main (int argc, char **argv)
{
	while (--argc > 0 && **++argv == '-') {
/* ====> */	while (*++*argv) {
			switch (**argv) {
			case 'd':
				debug++;
				break;
			...
			default:
				usage ();
			}
		}
	}
	...
}

The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell.  With the modification, the compiler will prevent this with
an
	error: increment of read-only location '*argv'

N.B.: The code above can be trivially rewritten like this:

	while (--argc > 0 && **++argv == '-') {
		char *arg = *argv;
		while (*++arg) {
			switch (*arg) {
			...

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
---
 arch/powerpc/cpu/74xx_7xx/cpu.c           | 2 +-
 arch/powerpc/cpu/74xx_7xx/interrupts.c    | 2 +-
 arch/powerpc/cpu/mpc512x/cpu.c            | 2 +-
 arch/powerpc/cpu/mpc512x/diu.c            | 2 +-
 arch/powerpc/cpu/mpc512x/iim.c            | 2 +-
 arch/powerpc/cpu/mpc512x/speed.c          | 2 +-
 arch/powerpc/cpu/mpc5xx/cpu.c             | 2 +-
 arch/powerpc/cpu/mpc5xx/interrupts.c      | 2 +-
 arch/powerpc/cpu/mpc5xxx/cpu.c            | 2 +-
 arch/powerpc/cpu/mpc5xxx/interrupts.c     | 2 +-
 arch/powerpc/cpu/mpc8220/cpu.c            | 2 +-
 arch/powerpc/cpu/mpc8220/interrupts.c     | 2 +-
 arch/powerpc/cpu/mpc824x/cpu.c            | 2 +-
 arch/powerpc/cpu/mpc8260/bedbug_603e.c    | 4 ++--
 arch/powerpc/cpu/mpc8260/cpu.c            | 2 +-
 arch/powerpc/cpu/mpc8260/interrupts.c     | 2 +-
 arch/powerpc/cpu/mpc83xx/cpu.c            | 2 +-
 arch/powerpc/cpu/mpc83xx/ecc.c            | 2 +-
 arch/powerpc/cpu/mpc83xx/interrupts.c     | 2 +-
 arch/powerpc/cpu/mpc83xx/speed.c          | 2 +-
 arch/powerpc/cpu/mpc85xx/cpu.c            | 2 +-
 arch/powerpc/cpu/mpc85xx/interrupts.c     | 2 +-
 arch/powerpc/cpu/mpc85xx/mp.c             | 2 +-
 arch/powerpc/cpu/mpc86xx/cpu.c            | 2 +-
 arch/powerpc/cpu/mpc86xx/interrupts.c     | 2 +-
 arch/powerpc/cpu/mpc86xx/mp.c             | 2 +-
 arch/powerpc/cpu/mpc8xx/bedbug_860.c      | 4 ++--
 arch/powerpc/cpu/mpc8xx/cpu.c             | 4 ++--
 arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c    | 2 +-
 arch/powerpc/cpu/ppc4xx/bedbug_405.c      | 4 ++--
 arch/powerpc/cpu/ppc4xx/cmd_chip_config.c | 2 +-
 arch/powerpc/cpu/ppc4xx/cpu.c             | 2 +-
 arch/powerpc/cpu/ppc4xx/interrupts.c      | 2 +-
 arch/powerpc/lib/bootm.c                  | 4 ++--
 arch/powerpc/lib/kgdb.c                   | 2 +-
 35 files changed, 40 insertions(+), 40 deletions(-)

(limited to 'arch/powerpc')

diff --git a/arch/powerpc/cpu/74xx_7xx/cpu.c b/arch/powerpc/cpu/74xx_7xx/cpu.c
index 14d3ce4..ab6f11d 100644
--- a/arch/powerpc/cpu/74xx_7xx/cpu.c
+++ b/arch/powerpc/cpu/74xx_7xx/cpu.c
@@ -235,7 +235,7 @@ soft_restart(unsigned long addr)
     !defined(CONFIG_PPMC7XX)
 /* no generic way to do board reset. simply call soft_reset. */
 void
-do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	ulong addr;
 	/* flush and disable I/D cache */
diff --git a/arch/powerpc/cpu/74xx_7xx/interrupts.c b/arch/powerpc/cpu/74xx_7xx/interrupts.c
index c2856c9..7fc8a34 100644
--- a/arch/powerpc/cpu/74xx_7xx/interrupts.c
+++ b/arch/powerpc/cpu/74xx_7xx/interrupts.c
@@ -98,7 +98,7 @@ irq_free_handler(int vec)
 /****************************************************************************/
 
 void
-do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
 {
 	puts("IRQ related functions are unimplemented currently.\n");
 }
diff --git a/arch/powerpc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c
index 09cbd20..a1a3bd4 100644
--- a/arch/powerpc/cpu/mpc512x/cpu.c
+++ b/arch/powerpc/cpu/mpc512x/cpu.c
@@ -75,7 +75,7 @@ int checkcpu (void)
 
 
 int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
 	ulong msr;
 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
diff --git a/arch/powerpc/cpu/mpc512x/diu.c b/arch/powerpc/cpu/mpc512x/diu.c
index 1cce6a2..f638c00 100644
--- a/arch/powerpc/cpu/mpc512x/diu.c
+++ b/arch/powerpc/cpu/mpc512x/diu.c
@@ -107,7 +107,7 @@ int mpc5121_diu_init(void)
 }
 
 int mpc5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
-			     int flag, int argc, char *argv[])
+			     int flag, int argc, char * const argv[])
 {
 	unsigned int addr;
 
diff --git a/arch/powerpc/cpu/mpc512x/iim.c b/arch/powerpc/cpu/mpc512x/iim.c
index 8f2eb37..abec8f6 100644
--- a/arch/powerpc/cpu/mpc512x/iim.c
+++ b/arch/powerpc/cpu/mpc512x/iim.c
@@ -278,7 +278,7 @@ int ads5121_fuse_stat(int bank)
 	return 0;
 }
 
-int do_ads5121_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ads5121_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	int frow, n, v, bank;
 
diff --git a/arch/powerpc/cpu/mpc512x/speed.c b/arch/powerpc/cpu/mpc512x/speed.c
index ce8d094..9d749f2 100644
--- a/arch/powerpc/cpu/mpc512x/speed.c
+++ b/arch/powerpc/cpu/mpc512x/speed.c
@@ -131,7 +131,7 @@ ulong get_bus_freq (ulong dummy)
 	return gd->csb_clk;
 }
 
-int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
 	char buf[32];
 
diff --git a/arch/powerpc/cpu/mpc5xx/cpu.c b/arch/powerpc/cpu/mpc5xx/cpu.c
index 7fffebc..5aa7f84 100644
--- a/arch/powerpc/cpu/mpc5xx/cpu.c
+++ b/arch/powerpc/cpu/mpc5xx/cpu.c
@@ -138,7 +138,7 @@ int dcache_status (void)
 /*
  * Reset board
  */
-int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
 #if defined(CONFIG_PATI)
 	volatile ulong *addr = (ulong *) CONFIG_SYS_RESET_ADDRESS;
diff --git a/arch/powerpc/cpu/mpc5xx/interrupts.c b/arch/powerpc/cpu/mpc5xx/interrupts.c
index 167543f..66bce30 100644
--- a/arch/powerpc/cpu/mpc5xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc5xx/interrupts.c
@@ -184,7 +184,7 @@ void timer_interrupt_cpu (struct pt_regs *regs)
  * irqinfo - print information about IRQs
  *
  */
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	int vec;
 
diff --git a/arch/powerpc/cpu/mpc5xxx/cpu.c b/arch/powerpc/cpu/mpc5xxx/cpu.c
index 44b8a7a..0c1eebd 100644
--- a/arch/powerpc/cpu/mpc5xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc5xxx/cpu.c
@@ -78,7 +78,7 @@ int checkcpu (void)
 /* ------------------------------------------------------------------------- */
 
 int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
 	ulong msr;
 	/* Interrupts and MMU off */
diff --git a/arch/powerpc/cpu/mpc5xxx/interrupts.c b/arch/powerpc/cpu/mpc5xxx/interrupts.c
index 16eee3a..50455d0 100644
--- a/arch/powerpc/cpu/mpc5xxx/interrupts.c
+++ b/arch/powerpc/cpu/mpc5xxx/interrupts.c
@@ -311,7 +311,7 @@ void irq_free_handler(int irq)
 /****************************************************************************/
 
 #if defined(CONFIG_CMD_IRQ)
-void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
 {
 	int irq, re_enable;
 	u32 intr_ctrl;
diff --git a/arch/powerpc/cpu/mpc8220/cpu.c b/arch/powerpc/cpu/mpc8220/cpu.c
index 563cfe0..64e0526 100644
--- a/arch/powerpc/cpu/mpc8220/cpu.c
+++ b/arch/powerpc/cpu/mpc8220/cpu.c
@@ -52,7 +52,7 @@ int checkcpu (void)
 
 /* ------------------------------------------------------------------------- */
 
-int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
 	volatile gptmr8220_t *gptmr = (volatile gptmr8220_t *) MMAP_GPTMR;
 	ulong msr;
diff --git a/arch/powerpc/cpu/mpc8220/interrupts.c b/arch/powerpc/cpu/mpc8220/interrupts.c
index 78e9917..9544d85 100644
--- a/arch/powerpc/cpu/mpc8220/interrupts.c
+++ b/arch/powerpc/cpu/mpc8220/interrupts.c
@@ -74,7 +74,7 @@ void irq_free_handler (int vec)
 /****************************************************************************/
 
 void
-do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
 {
 	puts ("IRQ related functions are unimplemented currently.\n");
 }
diff --git a/arch/powerpc/cpu/mpc824x/cpu.c b/arch/powerpc/cpu/mpc824x/cpu.c
index 08f6a94..44f91b2 100644
--- a/arch/powerpc/cpu/mpc824x/cpu.c
+++ b/arch/powerpc/cpu/mpc824x/cpu.c
@@ -92,7 +92,7 @@ int checkdcache (void)
 
 /*------------------------------------------------------------------- */
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	ulong msr, addr;
 
diff --git a/arch/powerpc/cpu/mpc8260/bedbug_603e.c b/arch/powerpc/cpu/mpc8260/bedbug_603e.c
index c969ff6..2488612 100644
--- a/arch/powerpc/cpu/mpc8260/bedbug_603e.c
+++ b/arch/powerpc/cpu/mpc8260/bedbug_603e.c
@@ -18,7 +18,7 @@
 extern CPU_DEBUG_CTX bug_ctx;
 
 void bedbug603e_init __P((void));
-void bedbug603e_do_break __P((cmd_tbl_t*,int,int,char*[]));
+void bedbug603e_do_break __P((cmd_tbl_t*,int,int,char*const[]));
 void bedbug603e_break_isr __P((struct pt_regs*));
 int  bedbug603e_find_empty __P((void));
 int  bedbug603e_set __P((int,unsigned long));
@@ -64,7 +64,7 @@ void bedbug603e_init( void )
  * ====================================================================== */
 
 void bedbug603e_do_break (cmd_tbl_t *cmdtp, int flag, int argc,
-			 char *argv[])
+			 char * const argv[])
 {
   long		addr;           /* Address to break at  */
   int		which_bp;       /* Breakpoint number    */
diff --git a/arch/powerpc/cpu/mpc8260/cpu.c b/arch/powerpc/cpu/mpc8260/cpu.c
index aedbf29..220c1e2 100644
--- a/arch/powerpc/cpu/mpc8260/cpu.c
+++ b/arch/powerpc/cpu/mpc8260/cpu.c
@@ -238,7 +238,7 @@ void upmconfig (uint upm, uint * table, uint size)
 
 #if !defined(CONFIG_HAVE_OWN_RESET)
 int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
 	ulong msr, addr;
 
diff --git a/arch/powerpc/cpu/mpc8260/interrupts.c b/arch/powerpc/cpu/mpc8260/interrupts.c
index 2606c60..79178cc 100644
--- a/arch/powerpc/cpu/mpc8260/interrupts.c
+++ b/arch/powerpc/cpu/mpc8260/interrupts.c
@@ -256,7 +256,7 @@ void timer_interrupt_cpu (struct pt_regs *regs)
 *
 */
 void
-do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
 {
 	int irq, re_enable;
 
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index d3be909..b664c64 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -192,7 +192,7 @@ void upmconfig (uint upm, uint *table, uint size)
 
 
 int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
 	ulong msr;
 #ifndef MPC83xx_RESET
diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c
index f3942b4..8dadd64 100644
--- a/arch/powerpc/cpu/mpc83xx/ecc.c
+++ b/arch/powerpc/cpu/mpc83xx/ecc.c
@@ -98,7 +98,7 @@ void ecc_print_status(void)
 	       ddr->capture_attributes & ECC_CAPT_ATTR_VLD);
 }
 
-int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile ddr83xx_t *ddr = &immap->ddr;
diff --git a/arch/powerpc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c
index faffbaf..446af27 100644
--- a/arch/powerpc/cpu/mpc83xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc83xx/interrupts.c
@@ -90,7 +90,7 @@ void timer_interrupt_cpu (struct pt_regs *regs)
  */
 
 void
-do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
 {
 }
 
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index 500eef1..b5076a9 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -497,7 +497,7 @@ ulong get_bus_freq(ulong dummy)
 	return gd->csb_clk;
 }
 
-int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
 	char buf[32];
 
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index fddeb2f..6f81fdf 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -186,7 +186,7 @@ int checkcpu (void)
 
 /* ------------------------------------------------------------------------- */
 
-int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
 {
 /* Everything after the first generation of PQ3 parts has RSTCR */
 #if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
diff --git a/arch/powerpc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c
index 409367d..ac8c01a 100644
--- a/arch/powerpc/cpu/mpc85xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc85xx/interrupts.c
@@ -103,7 +103,7 @@ void timer_interrupt_cpu(struct pt_regs *regs)
 
 #if defined(CONFIG_CMD_IRQ)
 /* irqinfo - print information about PCI devices,not implemented. */
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	return 0;
 }
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 826bf32..ddbc221 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -105,7 +105,7 @@ static u8 boot_entry_map[4] = {
 	BOOT_ENTRY_R6_LOWER,
 };
 
-int cpu_release(int nr, int argc, char *argv[])
+int cpu_release(int nr, int argc, char * const argv[])
 {
 	u32 i, val, *table = (u32 *)get_spin_virt_addr() + nr * NUM_BOOT_ENTRY;
 	u64 boot_addr;
diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c
index 1887575..9064e78 100644
--- a/arch/powerpc/cpu/mpc86xx/cpu.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu.c
@@ -124,7 +124,7 @@ checkcpu(void)
 
 
 void
-do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
 	volatile ccsr_gur_t *gur = &immap->im_gur;
diff --git a/arch/powerpc/cpu/mpc86xx/interrupts.c b/arch/powerpc/cpu/mpc86xx/interrupts.c
index c78fc72..d8ad6d3 100644
--- a/arch/powerpc/cpu/mpc86xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc86xx/interrupts.c
@@ -101,7 +101,7 @@ void irq_free_handler(int vec)
 /*
  * irqinfo - print information about PCI devices,not implemented.
  */
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	return 0;
 }
diff --git a/arch/powerpc/cpu/mpc86xx/mp.c b/arch/powerpc/cpu/mpc86xx/mp.c
index b4a0faa..24eb30a 100644
--- a/arch/powerpc/cpu/mpc86xx/mp.c
+++ b/arch/powerpc/cpu/mpc86xx/mp.c
@@ -66,7 +66,7 @@ int cpu_disable(int nr)
 	return 0;
 }
 
-int cpu_release(int nr, int argc, char *argv[])
+int cpu_release(int nr, int argc, char * const argv[])
 {
 	/* dummy function so common/cmd_mp.c will build
 	 * should be implemented in the future */
diff --git a/arch/powerpc/cpu/mpc8xx/bedbug_860.c b/arch/powerpc/cpu/mpc8xx/bedbug_860.c
index 0308bbb..9deda6c 100644
--- a/arch/powerpc/cpu/mpc8xx/bedbug_860.c
+++ b/arch/powerpc/cpu/mpc8xx/bedbug_860.c
@@ -17,7 +17,7 @@
 extern CPU_DEBUG_CTX bug_ctx;
 
 void bedbug860_init __P((void));
-void bedbug860_do_break __P((cmd_tbl_t*,int,int,char*[]));
+void bedbug860_do_break __P((cmd_tbl_t*,int,int,char*const[]));
 void bedbug860_break_isr __P((struct pt_regs*));
 int  bedbug860_find_empty __P((void));
 int  bedbug860_set __P((int,unsigned long));
@@ -63,7 +63,7 @@ void bedbug860_init( void )
  * ====================================================================== */
 
 void bedbug860_do_break (cmd_tbl_t *cmdtp, int flag, int argc,
-			 char *argv[])
+			 char * const argv[])
 {
   long		addr = 0;       /* Address to break at  */
   int		which_bp;       /* Breakpoint number    */
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 2eb848b..142cfa5 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -478,7 +478,7 @@ void upmconfig (uint upm, uint * table, uint size)
 
 #ifndef CONFIG_LWMON
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	ulong msr, addr;
 
@@ -521,7 +521,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  * and thus too short to reset the external hardware. So we  use  the
  * watchdog to reset the board.
  */
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	/* prevent triggering the watchdog */
 	disable_interrupts ();
diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
index b2cc2fe..ff5ef5f 100644
--- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
@@ -418,7 +418,7 @@ static void	test(void);
 static void	DQS_calibration_process(void);
 #endif
 #endif
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 
 static unsigned char spd_read(uchar chip, uint addr)
 {
diff --git a/arch/powerpc/cpu/ppc4xx/bedbug_405.c b/arch/powerpc/cpu/ppc4xx/bedbug_405.c
index ef11cb6..e1500cc 100644
--- a/arch/powerpc/cpu/ppc4xx/bedbug_405.c
+++ b/arch/powerpc/cpu/ppc4xx/bedbug_405.c
@@ -17,7 +17,7 @@
 extern CPU_DEBUG_CTX bug_ctx;
 
 void bedbug405_init __P ((void));
-void bedbug405_do_break __P ((cmd_tbl_t *, int, int, char *[]));
+void bedbug405_do_break __P ((cmd_tbl_t *, int, int, char * const []));
 void bedbug405_break_isr __P ((struct pt_regs *));
 int bedbug405_find_empty __P ((void));
 int bedbug405_set __P ((int, unsigned long));
@@ -63,7 +63,7 @@ void bedbug405_init (void)
  * set routine which will assign a breakpoint number.
  * ====================================================================== */
 
-void bedbug405_do_break (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+void bedbug405_do_break (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
 	long addr = 0;		/* Address to break at  */
 	int which_bp;		/* Breakpoint number    */
diff --git a/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c b/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c
index ba57211..72c5aec 100644
--- a/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c
+++ b/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c
@@ -45,7 +45,7 @@ static void print_configs(int cur_config_nr)
 
 }
 
-static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	int i;
 	int ret;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index e1a023b..851065c 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -688,7 +688,7 @@ int ppc440spe_revB() {
 
 /* ------------------------------------------------------------------------- */
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 #if defined(CONFIG_BOARD_RESET)
 	board_reset();
diff --git a/arch/powerpc/cpu/ppc4xx/interrupts.c b/arch/powerpc/cpu/ppc4xx/interrupts.c
index 6db8421..c89bf37 100644
--- a/arch/powerpc/cpu/ppc4xx/interrupts.c
+++ b/arch/powerpc/cpu/ppc4xx/interrupts.c
@@ -194,7 +194,7 @@ void irq_free_handler(int vec)
 }
 
 #if defined(CONFIG_CMD_IRQ)
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	int vec;
 
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 6702df5..3064121 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -47,7 +47,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 extern ulong get_effective_memsize(void);
 static ulong get_sp (void);
 static void set_clocks_in_mhz (bd_t *kbd);
@@ -297,7 +297,7 @@ static int boot_body_linux(bootm_headers_t *images)
 }
 
 __attribute__((noinline))
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
 {
 	int	ret;
 
diff --git a/arch/powerpc/lib/kgdb.c b/arch/powerpc/lib/kgdb.c
index d3eb1f3..1ec6818 100644
--- a/arch/powerpc/lib/kgdb.c
+++ b/arch/powerpc/lib/kgdb.c
@@ -313,7 +313,7 @@ kgdb_putregs(struct pt_regs *regs, char *buf, int length)
    the debugger. */
 
 void
-kgdb_breakpoint(int argc, char *argv[])
+kgdb_breakpoint(int argc, char * const argv[])
 {
 	asm("	.globl breakinst\n\
 	     breakinst: .long 0x7d821008\n\
-- 
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