From e45c98ad35ca600e25e9264528e7b6be17969f8c Mon Sep 17 00:00:00 2001 From: Joakim Tjernlund Date: Fri, 19 Nov 2010 14:15:33 +0100 Subject: mpc83xx: Make it boot again After the removal of COLD/WARM start flags my mpc8321 board didn't boot anymore. Trial and error suggests that map/remap_flash_by_xxx needs to wait after updating LBLAWAR1 to make sure the the change has reached the HW before continuing with the code that depends on it. Final fix suggested by Scott Wood. Signed-off-by: Joakim Tjernlund Acked-by: Scott Wood Signed-off-by: Kim Phillips --- arch/powerpc/cpu/mpc83xx/start.S | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 515be4c..460ac9a 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -1158,6 +1158,10 @@ map_flash_by_law1: bne 1b stw r4, LBLAWAR1(r3) /* LBLAWAR1 <= 8MB Flash Size */ + /* Wait for HW to catch up */ + lwz r4, LBLAWAR1(r3) + twi 0,r4,0 + isync blr /* Though all the LBIU Local Access Windows and LBC Banks will be @@ -1196,5 +1200,9 @@ remap_flash_by_law0: xor r4, r4, r4 stw r4, LBLAWBAR1(r3) stw r4, LBLAWAR1(r3) /* Off LBIU LAW1 */ + /* Wait for HW to catch up */ + lwz r4, LBLAWAR1(r3) + twi 0,r4,0 + isync blr #endif /* CONFIG_SYS_FLASHBOOT */ -- cgit v1.1 From a55bb8340ba8682782f816f0b9b3de13e5512e28 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 29 Nov 2010 14:32:11 -0600 Subject: powerpc/85xx: Introduce CONFIG_SYS_EXTRA_ENV_RELOC Some systems need to relocate the env_addr pointer early because the location it points to will get invalidated before env_relocate is called. One example is on systems that might use a L2 or L3 cache in SRAM mode and initialize that cache from SRAM mode back to being a cache in cpu_init_r. We set this on the 85xx boards that have support for NAND, SPI, or SDHC/MMC boot support as they use a secondary cache in SRAM mode and need the env_addr pointer relocated since we change from SRAM to normal cache mode in cpu_init_r. Also removed CONFIG_SYS_SPL as its not used anywhere. Signed-off-by: Kumar Gala --- arch/powerpc/lib/board.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/powerpc') diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index b21c1d6..9759e23 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -645,6 +645,17 @@ void board_init_r (gd_t *id, ulong dest_addr) gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE; #endif +#ifdef CONFIG_SYS_EXTRA_ENV_RELOC + /* + * Some systems need to relocate the env_addr pointer early because the + * location it points to will get invalidated before env_relocate is + * called. One example is on systems that might use a L2 or L3 cache + * in SRAM mode and initialize that cache from SRAM mode back to being + * a cache in cpu_init_r. + */ + gd->env_addr += dest_addr - CONFIG_SYS_MONITOR_BASE; +#endif + #ifdef CONFIG_SERIAL_MULTI serial_initialize(); #endif -- cgit v1.1 From 888279b5ed8a6243eda81af84a98adc64c5e4453 Mon Sep 17 00:00:00 2001 From: Haiying Wang Date: Wed, 1 Dec 2010 10:35:30 -0500 Subject: powerpc/85xx: do not reloc l2srbar if CONFIG_FLASH_BASE is not defined This fixes the compiling error for the board which doesn't have NOR flash (so CONFIG_FLASH_BASE is not defined) Signed-off-by: Haiying Wang Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 27236a0..4b8faa5 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -327,7 +327,7 @@ int cpu_init_r(void) if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) { puts("already enabled"); l2srbar = l2cache->l2srbar0; -#ifdef CONFIG_SYS_INIT_L2_ADDR +#if defined(CONFIG_SYS_INIT_L2_ADDR) && defined(CONFIG_SYS_FLASH_BASE) if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE && l2srbar >= CONFIG_SYS_FLASH_BASE) { l2srbar = CONFIG_SYS_INIT_L2_ADDR; -- cgit v1.1 From 054289f752371533285ae709003a683e6964f88f Mon Sep 17 00:00:00 2001 From: Baidu Boy Date: Mon, 29 Nov 2010 21:10:45 +0800 Subject: mpc83xx: fix pcie enumeration This patch fix a problem for the pcie enumeration for mpc83xx cpus. Without this we will not get correct value in hose->regions[...]. The pointer *reg in function mpc83xx_pcie_init_bus() shall not be changed. Because we will use this pointer as a parameter to call function mpc83xx_pcie_register_hose(). Signed-off-by: Baidu Boy Signed-off-by: Kim Phillips --- arch/powerpc/cpu/mpc83xx/pcie.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index 1771c48..46a706d 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -201,18 +201,18 @@ static void mpc83xx_pcie_init_bus(int bus, struct pci_region *reg) out_le32(&out_win->tarl, 0); out_le32(&out_win->tarh, 0); - for (i = 0; i < 2; i++, reg++) { + for (i = 0; i < 2; i++) { u32 ar; - if (reg->size == 0) + if (reg[i].size == 0) break; out_win = &pex->bridge.pex_outbound_win[i + 1]; - out_le32(&out_win->bar, reg->phys_start); - out_le32(&out_win->tarl, reg->bus_start); + out_le32(&out_win->bar, reg[i].phys_start); + out_le32(&out_win->tarl, reg[i].bus_start); out_le32(&out_win->tarh, 0); - ar = PEX_OWAR_EN | (reg->size & PEX_OWAR_SIZE); - if (reg->flags & PCI_REGION_IO) + ar = PEX_OWAR_EN | (reg[i].size & PEX_OWAR_SIZE); + if (reg[i].flags & PCI_REGION_IO) ar |= PEX_OWAR_TYPE_IO; else ar |= PEX_OWAR_TYPE_MEM; -- cgit v1.1