From e71372cb6371033a762b3329d063c3735a783a76 Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 18 Nov 2016 11:24:40 -0800 Subject: powerpc: P4080: Remove macro CONFIG_PPC_P4080 Replace CONFIG_PPC_P4080 with ARCH_P4080 in Kconfig and clean up existing macros. Signed-off-by: York Sun --- arch/powerpc/include/asm/config_mpc85xx.h | 2 +- arch/powerpc/include/asm/fsl_secure_boot.h | 2 +- arch/powerpc/include/asm/immap_85xx.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 8f0a250..011aec6 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -378,7 +378,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 -#elif defined(CONFIG_PPC_P4080) /* also supports P4040 */ +#elif defined(CONFIG_ARCH_P4080) /* also supports P4040 */ #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MAX_CPUS 8 diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index b75ae11..38b666c 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -59,7 +59,7 @@ #endif #if defined(CONFIG_ARCH_P3041) || \ - defined(CONFIG_PPC_P4080) || \ + defined(CONFIG_ARCH_P4080) || \ defined(CONFIG_PPC_P5020) || \ defined(CONFIG_PPC_P5040) || \ defined(CONFIG_ARCH_P2041) diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index cdfdb88..83f8b8f 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1848,7 +1848,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define FSL_CORENET_RCWSR8_HOST_AGT_B1 0x00e00000 #define FSL_CORENET_RCWSR8_HOST_AGT_B2 0x00100000 #define FSL_CORENET_RCWSR11_EC1 0x00c00000 /* bits 360..361 */ -#ifdef CONFIG_PPC_P4080 +#ifdef CONFIG_ARCH_P4080 #define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC1 0x00000000 #define FSL_CORENET_RCWSR11_EC1_FM1_USB1 0x00800000 #define FSL_CORENET_RCWSR11_EC2 0x001c0000 /* bits 363..365 */ -- cgit v1.1