From cae7c1b56b4f59289a1b2f10532c2c6a0b12c6c1 Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 26 Aug 2011 11:32:40 -0700 Subject: powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en Check second DIMM slot in case the first one is empty. Honor DQS enable option for SDRAM mode register. Signed-off-by: York Sun Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/fsl_ddr_sdram.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/powerpc/include/asm/fsl_ddr_sdram.h') diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h index bc063ea..5b6e8d9 100644 --- a/arch/powerpc/include/asm/fsl_ddr_sdram.h +++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h @@ -92,6 +92,10 @@ typedef ddr3_spd_eeprom_t generic_spd_eeprom_t; #define SDRAM_CFG2_D_INIT 0x00000010 #define SDRAM_CFG2_ODT_CFG_MASK 0x00600000 +#define SDRAM_CFG2_ODT_NEVER 0 +#define SDRAM_CFG2_ODT_ONLY_WRITE 1 +#define SDRAM_CFG2_ODT_ONLY_READ 2 +#define SDRAM_CFG2_ODT_ALWAYS 3 #define TIMING_CFG_2_CPO_MASK 0x0F800000 -- cgit v1.1