From f605079041079cb4e84693110e26086f8d1a8bcd Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Mon, 24 Nov 2014 17:11:54 +0800 Subject: powerpc/mpc85xx: Add T1024/T1023 SoC support Add support for Freescale T1024/T1023 SoC. The T1024 SoC includes the following function and features: - Two 64-bit Power architecture e5500 cores, up to 1.4GHz - private 256KB L2 cache each core and shared 256KB CoreNet platform cache (CPC) - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration - Four MAC for 1G/2.5G/10G network interfaces (RGMII, SGMII, QSGMII, XFI) - High-speed peripheral interfaces - Three PCI Express 2.0 controllers - Additional peripheral interfaces - One SATA 2.0 controller - Two USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/eSDHC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Two 8-channel DMA engines - Multicore programmable interrupt controller (PIC) - LCD interface (DIU) with 12 bit dual data rate - QUICC Engine block supporting TDM, HDLC, and UART - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 Differences between T1024 and T1023: Feature T1024 T1023 QUICC Engine: yes no DIU: yes no Deep Sleep: yes no I2C controller: 4 3 DDR: 64-bit 32-bit IFC: 32-bit 28-bit Signed-off-by: Shengzhou Liu Reviewed-by: York Sun --- arch/powerpc/cpu/mpc8xxx/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/powerpc/cpu/mpc8xxx') diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 84fec5e..2d28eb2 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -76,6 +76,10 @@ static struct cpu_type cpu_type_list[] = { CPU_TYPE_ENTRY(T1020, T1020, 0), CPU_TYPE_ENTRY(T1021, T1021, 0), CPU_TYPE_ENTRY(T1022, T1022, 0), + CPU_TYPE_ENTRY(T1024, T1024, 0), + CPU_TYPE_ENTRY(T1023, T1023, 0), + CPU_TYPE_ENTRY(T1014, T1014, 0), + CPU_TYPE_ENTRY(T1013, T1013, 0), CPU_TYPE_ENTRY(T2080, T2080, 0), CPU_TYPE_ENTRY(T2081, T2081, 0), CPU_TYPE_ENTRY(BSC9130, 9130, 1), -- cgit v1.1