From 50689461205e0125759eb1a43787383a3fa09b48 Mon Sep 17 00:00:00 2001 From: "mario.six@gdsys.cc" Date: Tue, 5 Apr 2016 15:05:37 +0200 Subject: powerpc: mpc85xx: Enable pre-relocation malloc for MPC85xx To enable DM on MPC85xx, we need pre-relocation malloc, which is implemented in this patch. We also make sure that the IVORs are always 4-aligned on e500 to prevent alignment exceptions caused by code changes in start.S. Signed-off-by: Mario Six Cc: York Sun Cc: Simon Glass Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) (limited to 'arch/powerpc/cpu/mpc85xx/cpu_init_early.c') diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 235a635..aa519b0 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -82,7 +82,6 @@ void setup_ifc(void) void cpu_init_early_f(void *fdt) { u32 mas0, mas1, mas2, mas3, mas7; - int i; #ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif @@ -90,17 +89,13 @@ void cpu_init_early_f(void *fdt) ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; u32 *dst, *src; void (*setup_ifc_sram)(void); + int i; #endif /* Pointer is writable since we allocated a register for it */ gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); - /* - * Clear initial global data - * we don't use memset so we can share this code with NAND_SPL - */ - for (i = 0; i < sizeof(gd_t); i++) - ((char *)gd)[i] = 0; + /* gd area was zeroed during startup */ #ifdef CONFIG_QEMU_E500 /* -- cgit v1.1