From 30374f98d14d5979f95a9d21d66346eaa9a795a1 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Thu, 29 Jan 2015 01:27:57 +0000 Subject: MIPS: unify cache maintenance functions Move the more developed mips32 version of the cache maintenance functions to a common arch/mips/lib/cache.c, in order to reduce duplication between mips32 & mips64. Signed-off-by: Paul Burton Cc: Daniel Schwierzeck --- arch/mips/cpu/mips32/cpu.c | 109 --------------------------------------------- 1 file changed, 109 deletions(-) (limited to 'arch/mips/cpu/mips32/cpu.c') diff --git a/arch/mips/cpu/mips32/cpu.c b/arch/mips/cpu/mips32/cpu.c index 1af909a..8e1cc4e 100644 --- a/arch/mips/cpu/mips32/cpu.c +++ b/arch/mips/cpu/mips32/cpu.c @@ -9,7 +9,6 @@ #include #include #include -#include #include void __attribute__((weak)) _machine_restart(void) @@ -24,114 +23,6 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } -#ifdef CONFIG_SYS_CACHELINE_SIZE - -static inline unsigned long icache_line_size(void) -{ - return CONFIG_SYS_CACHELINE_SIZE; -} - -static inline unsigned long dcache_line_size(void) -{ - return CONFIG_SYS_CACHELINE_SIZE; -} - -#else /* !CONFIG_SYS_CACHELINE_SIZE */ - -static inline unsigned long icache_line_size(void) -{ - unsigned long conf1, il; - conf1 = read_c0_config1(); - il = (conf1 & MIPS_CONF1_IL) >> MIPS_CONF1_IL_SHIFT; - if (!il) - return 0; - return 2 << il; -} - -static inline unsigned long dcache_line_size(void) -{ - unsigned long conf1, dl; - conf1 = read_c0_config1(); - dl = (conf1 & MIPS_CONF1_DL) >> MIPS_CONF1_DL_SHIFT; - if (!dl) - return 0; - return 2 << dl; -} - -#endif /* !CONFIG_SYS_CACHELINE_SIZE */ - -void flush_cache(ulong start_addr, ulong size) -{ - unsigned long ilsize = icache_line_size(); - unsigned long dlsize = dcache_line_size(); - const void *addr, *aend; - - /* aend will be miscalculated when size is zero, so we return here */ - if (size == 0) - return; - - addr = (const void *)(start_addr & ~(dlsize - 1)); - aend = (const void *)((start_addr + size - 1) & ~(dlsize - 1)); - - if (ilsize == dlsize) { - /* flush I-cache & D-cache simultaneously */ - while (1) { - mips_cache(HIT_WRITEBACK_INV_D, addr); - mips_cache(HIT_INVALIDATE_I, addr); - if (addr == aend) - break; - addr += dlsize; - } - return; - } - - /* flush D-cache */ - while (1) { - mips_cache(HIT_WRITEBACK_INV_D, addr); - if (addr == aend) - break; - addr += dlsize; - } - - /* flush I-cache */ - addr = (const void *)(start_addr & ~(ilsize - 1)); - aend = (const void *)((start_addr + size - 1) & ~(ilsize - 1)); - while (1) { - mips_cache(HIT_INVALIDATE_I, addr); - if (addr == aend) - break; - addr += ilsize; - } -} - -void flush_dcache_range(ulong start_addr, ulong stop) -{ - unsigned long lsize = dcache_line_size(); - const void *addr = (const void *)(start_addr & ~(lsize - 1)); - const void *aend = (const void *)((stop - 1) & ~(lsize - 1)); - - while (1) { - mips_cache(HIT_WRITEBACK_INV_D, addr); - if (addr == aend) - break; - addr += lsize; - } -} - -void invalidate_dcache_range(ulong start_addr, ulong stop) -{ - unsigned long lsize = dcache_line_size(); - const void *addr = (const void *)(start_addr & ~(lsize - 1)); - const void *aend = (const void *)((stop - 1) & ~(lsize - 1)); - - while (1) { - mips_cache(HIT_INVALIDATE_D, addr); - if (addr == aend) - break; - addr += lsize; - } -} - void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1) { write_c0_entrylo0(low0); -- cgit v1.1