From 0f883267a877314f83236a3397c8e0040f8a1129 Mon Sep 17 00:00:00 2001 From: Stephan Linz Date: Wed, 22 Feb 2012 19:12:43 +0100 Subject: microblaze: avoid interrupt race conditions The interrupt acknowledge action have to run after the registered interrupt handler. So we have a chance to bear out the corresponding interrupt request in the corresponding controller hardware. With this reordering, we optain a proper interrupt handling for level triggered interrupt sources -- for example the new axi_timer v1.02.a introduced in ISE 13.2. Signed-off-by: Stephan Linz Acked-by: Michal Simek --- arch/microblaze/cpu/interrupts.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/microblaze/cpu') diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c index 5a13211..e7ca859 100644 --- a/arch/microblaze/cpu/interrupts.c +++ b/arch/microblaze/cpu/interrupts.c @@ -155,8 +155,6 @@ void interrupt_handler (void) #endif struct irq_action *act = vecs + irqs; - intc->iar = mask << irqs; - #ifdef DEBUG_INT printf ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n", @@ -165,6 +163,8 @@ void interrupt_handler (void) act->handler (act->arg); act->count++; + intc->iar = mask << irqs; + #ifdef DEBUG_INT printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, intc->iar, intc->mer); -- cgit v1.1