From 5811830fae92cf0a3bb11ead54ef1267464a1280 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 25 Sep 2012 10:13:35 +0200 Subject: microblaze: Flush caches before enabling them Flushing caches is necessary because of soft reset which doesn't clear caches. Signed-off-by: Michal Simek Reviewed-by: Marek Vasut --- arch/microblaze/cpu/start.S | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/microblaze/cpu/start.S') diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 8564c4e..3da711d 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -132,6 +132,12 @@ _start: rsubi r8, r10, 0x26 sh r6, r0, r8 + /* Flush cache before enable cache */ + addik r5, r0, 0 + addik r6, r0, XILINX_DCACHE_BYTE_SIZE +flush: bralid r15, flush_cache + nop + /* enable instruction and data cache */ mfs r12, rmsr ori r12, r12, 0xa0 -- cgit v1.1