From ab80b6595765a01f774ad2a29fde8b0c325533ac Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Fri, 30 Nov 2012 17:39:32 +0800 Subject: blackfin: Correct early serial mess output in BYPASS boot mode. The early serial should not be configured again in initcode() for BYPASS boot mode and in start() for the other LDR boot modes. In BYPASS boot mode, the start up code is located in Nor flash address other than the DRAM address defined in link script. The code embedded string can't be addressed by its compile time symbol. Calculate it according to the flash offset. Signed-off-by: Sonic Zhang --- arch/blackfin/include/asm/clock.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/blackfin/include') diff --git a/arch/blackfin/include/asm/clock.h b/arch/blackfin/include/asm/clock.h index df6cd68..f1fcd40 100644 --- a/arch/blackfin/include/asm/clock.h +++ b/arch/blackfin/include/asm/clock.h @@ -10,7 +10,7 @@ #include #ifdef PLL_CTL #include -# define pll_is_bypassed() (bfin_read_PLL_STAT() & DF) +# define pll_is_bypassed() (bfin_read_PLL_CTL() & BYPASS) #else #include # define pll_is_bypassed() (bfin_read_CGU_STAT() & PLLBP) @@ -55,7 +55,11 @@ static inline uint32_t early_get_uart_clk(void) if (!pll_is_bypassed()) { div = bfin_read_PLL_DIV(); ssel = (div & SSEL) >> SSEL_P; +#if CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS + sclk = vco/ssel; +#else sclk = early_division(vco, ssel); +#endif } uclk = sclk; #ifdef CGU_DIV -- cgit v1.1