From a2979dcdbeb39a01dc888090d2c736c2ad3f548d Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Thu, 16 Aug 2012 11:56:14 +0800 Subject: blackfin: bf60x: Port blackfin core architecture code to boot on bf60x. Set up clocks, DDR controller, Nor flash controller, reboot, serial port. Add new SPI boot modes. Signed-off-by: Bob Liu Signed-off-by: Sonic Zhang Signed-off-by: Sonic Zhang --- arch/blackfin/include/asm/config-pre.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/blackfin/include') diff --git a/arch/blackfin/include/asm/config-pre.h b/arch/blackfin/include/asm/config-pre.h index be5687c..d0fd537 100644 --- a/arch/blackfin/include/asm/config-pre.h +++ b/arch/blackfin/include/asm/config-pre.h @@ -29,6 +29,8 @@ #define BFIN_BOOT_16HOST_DMA 11 /* boot ldr from 16-bit host dma */ #define BFIN_BOOT_8HOST_DMA 12 /* boot ldr from 8-bit host dma */ #define BFIN_BOOT_NAND 13 /* boot ldr from nand flash */ +#define BFIN_BOOT_RSI_MASTER 14 /* boot ldr from rsi */ +#define BFIN_BOOT_LP_SLAVE 15 /* boot ldr from link port */ #ifndef __ASSEMBLY__ static inline const char *get_bfin_boot_mode(int bfin_boot) @@ -47,6 +49,8 @@ static inline const char *get_bfin_boot_mode(int bfin_boot) case BFIN_BOOT_16HOST_DMA: return "16bit dma"; case BFIN_BOOT_8HOST_DMA: return "8bit dma"; case BFIN_BOOT_NAND: return "nand flash"; + case BFIN_BOOT_RSI_MASTER: return "rsi master"; + case BFIN_BOOT_LP_SLAVE: return "link port slave"; default: return "INVALID"; } } -- cgit v1.1