From 234370cab4b2f096e095fe8f3284fd39740a4023 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Fri, 22 Mar 2013 02:26:36 +0000 Subject: Exynos5: clock: Update the equation to calculate PLL output frequency According to the latest exynos5 user manual, the equation for calculating PLL output was changed to FOUT= MDIV x FIN/(PDIV x 2^SDIV) earlier it was FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1)) So updating the clock code accordingly. Signed-off-by: Hatim Ali Signed-off-by: Akshay Saraswat Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 223660a..1203ada 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -116,10 +116,8 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */ fout = (m + k / 1024) * (freq / (p * (1 << s))); } else { - if (s < 1) - s = 1; - /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */ - fout = m * (freq / (p * (1 << (s - 1)))); + /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ + fout = m * (freq / (p * (1 << s))); } return fout; -- cgit v1.1 From 72af2fc8504daccd2f8ae2459e3e225e9c2cc512 Mon Sep 17 00:00:00 2001 From: Inderpal Singh Date: Thu, 4 Apr 2013 23:09:19 +0000 Subject: exynos: move tzpc_init to armv7/exynos tzpc_init is common for all exynos5 boards, hence move it to armv7/exynos so that all other boards can use it. Also update the smdk5250 Makefile and config file. Signed-off-by: Inderpal Singh Acked-by: Chander Kashyap Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/Makefile | 2 +- arch/arm/cpu/armv7/exynos/tzpc.c | 48 +++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/tzpc.h | 28 +++++++++++++++++++ 3 files changed, 77 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/exynos/tzpc.c (limited to 'arch/arm') diff --git a/arch/arm/cpu/armv7/exynos/Makefile b/arch/arm/cpu/armv7/exynos/Makefile index 9119961..b2f9152 100644 --- a/arch/arm/cpu/armv7/exynos/Makefile +++ b/arch/arm/cpu/armv7/exynos/Makefile @@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o -COBJS += clock.o power.o soc.o system.o pinmux.o +COBJS += clock.o power.o soc.o system.o pinmux.o tzpc.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/arch/arm/cpu/armv7/exynos/tzpc.c b/arch/arm/cpu/armv7/exynos/tzpc.c new file mode 100644 index 0000000..81adb4b --- /dev/null +++ b/arch/arm/cpu/armv7/exynos/tzpc.c @@ -0,0 +1,48 @@ +/* + * Lowlevel setup for SMDK5250 board based on S5PC520 + * + * Copyright (C) 2012 Samsung Electronics + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +/* Setting TZPC[TrustZone Protection Controller] */ +void tzpc_init(void) +{ + struct exynos_tzpc *tzpc; + unsigned int addr; + + for (addr = TZPC0_BASE; addr <= TZPC9_BASE; addr += TZPC_BASE_OFFSET) { + tzpc = (struct exynos_tzpc *)addr; + + if (addr == TZPC0_BASE) + writel(R0SIZE, &tzpc->r0size); + + writel(DECPROTXSET, &tzpc->decprot0set); + writel(DECPROTXSET, &tzpc->decprot1set); + + if (addr != TZPC9_BASE) { + writel(DECPROTXSET, &tzpc->decprot2set); + writel(DECPROTXSET, &tzpc->decprot3set); + } + } +} diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h b/arch/arm/include/asm/arch-exynos/tzpc.h index c5eb4b1..050ad70 100644 --- a/arch/arm/include/asm/arch-exynos/tzpc.h +++ b/arch/arm/include/asm/arch-exynos/tzpc.h @@ -47,6 +47,34 @@ struct exynos_tzpc { unsigned int pcellid2; unsigned int pcellid3; }; + +/* TZPC : Register Offsets */ +#define TZPC0_BASE 0x10100000 +#define TZPC1_BASE 0x10110000 +#define TZPC2_BASE 0x10120000 +#define TZPC3_BASE 0x10130000 +#define TZPC4_BASE 0x10140000 +#define TZPC5_BASE 0x10150000 +#define TZPC6_BASE 0x10160000 +#define TZPC7_BASE 0x10170000 +#define TZPC8_BASE 0x10180000 +#define TZPC9_BASE 0x10190000 + +#define TZPC_BASE_OFFSET 0x10000 + +/* + * TZPC Register Value : + * R0SIZE: 0x0 : Size of secured ram + */ +#define R0SIZE 0x0 + +/* + * TZPC Decode Protection Register Value : + * DECPROTXSET: 0xFF : Set Decode region to non-secure + */ +#define DECPROTXSET 0xFF +void tzpc_init(void); + #endif #endif -- cgit v1.1 From b5f9756f7f2449cf1b6c3e64dbc40f159f7dcbe2 Mon Sep 17 00:00:00 2001 From: Inderpal Singh Date: Thu, 4 Apr 2013 23:09:20 +0000 Subject: exynos: update tzpc to make it common for exynos4 and exynos5 This requires that cpu_is_exynos4/5 should be made available before tzpc_init. Hence this patch also makes necessary changes to have cpu_info in spl and invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250. Signed-off-by: Inderpal Singh Acked-by: Chander Kashyap Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/tzpc.c | 23 ++++++++++++++++------- arch/arm/cpu/armv7/s5p-common/Makefile | 2 ++ arch/arm/include/asm/arch-exynos/cpu.h | 4 ++++ arch/arm/include/asm/arch-exynos/tzpc.h | 14 +++----------- 4 files changed, 25 insertions(+), 18 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/cpu/armv7/exynos/tzpc.c b/arch/arm/cpu/armv7/exynos/tzpc.c index 81adb4b..f5e8e9c 100644 --- a/arch/arm/cpu/armv7/exynos/tzpc.c +++ b/arch/arm/cpu/armv7/exynos/tzpc.c @@ -22,6 +22,7 @@ * MA 02111-1307 USA */ +#include #include #include @@ -29,20 +30,28 @@ void tzpc_init(void) { struct exynos_tzpc *tzpc; - unsigned int addr; + unsigned int addr, start = 0, end = 0; - for (addr = TZPC0_BASE; addr <= TZPC9_BASE; addr += TZPC_BASE_OFFSET) { + start = samsung_get_base_tzpc(); + + if (cpu_is_exynos5()) + end = start + ((EXYNOS5_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET); + else if (cpu_is_exynos4()) + end = start + ((EXYNOS4_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET); + + for (addr = start; addr <= end; addr += TZPC_BASE_OFFSET) { tzpc = (struct exynos_tzpc *)addr; - if (addr == TZPC0_BASE) + if (addr == start) writel(R0SIZE, &tzpc->r0size); writel(DECPROTXSET, &tzpc->decprot0set); writel(DECPROTXSET, &tzpc->decprot1set); - if (addr != TZPC9_BASE) { - writel(DECPROTXSET, &tzpc->decprot2set); - writel(DECPROTXSET, &tzpc->decprot3set); - } + if (cpu_is_exynos5() && (addr == end)) + break; + + writel(DECPROTXSET, &tzpc->decprot2set); + writel(DECPROTXSET, &tzpc->decprot3set); } } diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile index 1705399..0c38bd0 100644 --- a/arch/arm/cpu/armv7/s5p-common/Makefile +++ b/arch/arm/cpu/armv7/s5p-common/Makefile @@ -26,9 +26,11 @@ include $(TOPDIR)/config.mk LIB = $(obj)libs5p-common.o COBJS-y += cpu_info.o +ifndef CONFIG_SPL_BUILD COBJS-y += timer.o COBJS-y += sromc.o COBJS-$(CONFIG_PWM) += pwm.o +endif SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index f76e489..36b98c8 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -38,6 +38,7 @@ #define EXYNOS4_CLOCK_BASE 0x10030000 #define EXYNOS4_SYSTIMER_BASE 0x10050000 #define EXYNOS4_WATCHDOG_BASE 0x10060000 +#define EXYNOS4_TZPC_BASE 0x10110000 #define EXYNOS4_MIU_BASE 0x10600000 #define EXYNOS4_DMC0_BASE 0x10400000 #define EXYNOS4_DMC1_BASE 0x10410000 @@ -74,6 +75,7 @@ #define EXYNOS4X12_CLOCK_BASE 0x10030000 #define EXYNOS4X12_SYSTIMER_BASE 0x10050000 #define EXYNOS4X12_WATCHDOG_BASE 0x10060000 +#define EXYNOS4X12_TZPC_BASE 0x10110000 #define EXYNOS4X12_DMC0_BASE 0x10600000 #define EXYNOS4X12_DMC1_BASE 0x10610000 #define EXYNOS4X12_GPIO_PART4_BASE 0x106E0000 @@ -107,6 +109,7 @@ #define EXYNOS5_POWER_BASE 0x10040000 #define EXYNOS5_SWRESET 0x10040400 #define EXYNOS5_SYSREG_BASE 0x10050000 +#define EXYNOS5_TZPC_BASE 0x10100000 #define EXYNOS5_WATCHDOG_BASE 0x101D0000 #define EXYNOS5_ACE_SFR_BASE 0x10830000 #define EXYNOS5_DMC_PHY0_BASE 0x10C00000 @@ -233,6 +236,7 @@ SAMSUNG_BASE(watchdog, WATCHDOG_BASE) SAMSUNG_BASE(power, POWER_BASE) SAMSUNG_BASE(spi, SPI_BASE) SAMSUNG_BASE(spi_isp, SPI_ISP_BASE) +SAMSUNG_BASE(tzpc, TZPC_BASE) #endif #endif /* _EXYNOS4_CPU_H */ diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h b/arch/arm/include/asm/arch-exynos/tzpc.h index 050ad70..4d9c3a3 100644 --- a/arch/arm/include/asm/arch-exynos/tzpc.h +++ b/arch/arm/include/asm/arch-exynos/tzpc.h @@ -48,18 +48,10 @@ struct exynos_tzpc { unsigned int pcellid3; }; -/* TZPC : Register Offsets */ -#define TZPC0_BASE 0x10100000 -#define TZPC1_BASE 0x10110000 -#define TZPC2_BASE 0x10120000 -#define TZPC3_BASE 0x10130000 -#define TZPC4_BASE 0x10140000 -#define TZPC5_BASE 0x10150000 -#define TZPC6_BASE 0x10160000 -#define TZPC7_BASE 0x10170000 -#define TZPC8_BASE 0x10180000 -#define TZPC9_BASE 0x10190000 +#define EXYNOS4_NR_TZPC_BANKS 6 +#define EXYNOS5_NR_TZPC_BANKS 10 +/* TZPC : Register Offsets */ #define TZPC_BASE_OFFSET 0x10000 /* -- cgit v1.1 From 07eb5f9ce70cbed40d0bb2799430a0978e054ef2 Mon Sep 17 00:00:00 2001 From: Amar Date: Sat, 27 Apr 2013 11:42:53 +0530 Subject: EXYNOS5: FDT: Add DWMMC device node data This patch adds DWMMC device node data for exynos5. This patch also adds binding file for DWMMC device node. Signed-off-by: Vivek Gautam Signed-off-by: Amar Acked-by: Jaehoon Chung Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- arch/arm/dts/exynos5250.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi index df4b231..cee4fe8 100644 --- a/arch/arm/dts/exynos5250.dtsi +++ b/arch/arm/dts/exynos5250.dtsi @@ -169,4 +169,37 @@ #address-cells = <1>; #size-cells = <1>; }; + + mmc@12200000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,exynos5250-dwmmc"; + reg = <0x12200000 0x1000>; + interrupts = <0 75 0>; + }; + + mmc@12210000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,exynos5250-dwmmc"; + reg = <0x12210000 0x1000>; + interrupts = <0 76 0>; + }; + + mmc@12220000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,exynos5250-dwmmc"; + reg = <0x12220000 0x1000>; + interrupts = <0 77 0>; + }; + + mmc@12230000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,exynos5250-dwmmc"; + reg = <0x12230000 0x1000>; + interrupts = <0 78 0>; + }; + }; -- cgit v1.1 From a082a2dde06142bb599551ed3dad324923a130e0 Mon Sep 17 00:00:00 2001 From: Amar Date: Sat, 27 Apr 2013 11:42:55 +0530 Subject: EXYNOS5: DWMMC: Added FDT support for DWMMC This patch adds FDT support for DWMMC, by reading the DWMMC node data from the device tree and initialising DWMMC channels as per data obtained from the node. Signed-off-by: Vivek Gautam Signed-off-by: Amar Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- arch/arm/include/asm/arch-exynos/dwmmc.h | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h b/arch/arm/include/asm/arch-exynos/dwmmc.h index 8acdf9b..3b147b8 100644 --- a/arch/arm/include/asm/arch-exynos/dwmmc.h +++ b/arch/arm/include/asm/arch-exynos/dwmmc.h @@ -27,10 +27,7 @@ #define DWMCI_SET_DRV_CLK(x) ((x) << 16) #define DWMCI_SET_DIV_RATIO(x) ((x) << 24) -int exynos_dwmci_init(u32 regbase, int bus_width, int index); - -static inline unsigned int exynos_dwmmc_init(int index, int bus_width) -{ - unsigned int base = samsung_get_base_mmc() + (0x10000 * index); - return exynos_dwmci_init(base, bus_width, index); -} +#ifdef CONFIG_OF_CONTROL +int exynos_dwmmc_init(const void *blob); +#endif +int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel); -- cgit v1.1 From 2b81c26b7c43f01cfaa5c4c50571b6854eece656 Mon Sep 17 00:00:00 2001 From: Amar Date: Sat, 27 Apr 2013 11:42:56 +0530 Subject: EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results. This patch initialises the local variable 'shift' to zero. The uninitialised local variable 'shift' had garbage value and was resulting in unwnated results in the functions exynos5_get_mmc_clk() and exynos4_get_mmc_clk(). Signed-off-by: Amar Acked-by: Simon Glass Acked-by: Jaehoon Chung Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 1203ada..e1c4246 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -611,7 +611,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) (struct exynos4_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(&clk->src_fsys); sel = (sel >> (dev_index << 2)) & 0xf; @@ -660,7 +660,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(&clk->src_fsys); sel = (sel >> (dev_index << 2)) & 0xf; -- cgit v1.1 From 1149ca005a548aff8e65d44634d31db965ed66bd Mon Sep 17 00:00:00 2001 From: Naveen Krishna Chatradhi Date: Fri, 5 Apr 2013 15:21:38 -0700 Subject: power: exynos-tmu: fix warnings and clean up code This patch does the folowing 1. change the data types for unsigned int variable to unsigned 2. change the tmu_base type to struct exynos5_tmu_reg * 3. Add timer functionality for get_cur_temp() 4. error handling in the get_tmu_fdt_values() 5. Add check for curr_temp reading 6. some cosmotic changes. Signed-off-by: Naveen Krishna Chatradhi Reviewed-by: Vadim Bendebury Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- arch/arm/include/asm/arch-exynos/tmu.h | 58 +++++++++++++++------------------- 1 file changed, 25 insertions(+), 33 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/arch-exynos/tmu.h b/arch/arm/include/asm/arch-exynos/tmu.h index 7e0158e..cad3569 100644 --- a/arch/arm/include/asm/arch-exynos/tmu.h +++ b/arch/arm/include/asm/arch-exynos/tmu.h @@ -21,38 +21,30 @@ #define __ASM_ARCH_TMU_H struct exynos5_tmu_reg { - unsigned triminfo; - unsigned rsvd1; - unsigned rsvd2; - unsigned rsvd3; - unsigned rsvd4; - unsigned triminfo_control; - unsigned rsvd5; - unsigned rsvd6; - unsigned tmu_control; - unsigned rsvd7; - unsigned tmu_status; - unsigned sampling_internal; - unsigned counter_value0; - unsigned counter_value1; - unsigned rsvd8; - unsigned rsvd9; - unsigned current_temp; - unsigned rsvd10; - unsigned rsvd11; - unsigned rsvd12; - unsigned threshold_temp_rise; - unsigned threshold_temp_fall; - unsigned rsvd13; - unsigned rsvd14; - unsigned past_temp3_0; - unsigned past_temp7_4; - unsigned past_temp11_8; - unsigned past_temp15_12; - unsigned inten; - unsigned intstat; - unsigned intclear; - unsigned rsvd15; - unsigned emul_con; + u32 triminfo; + u32 rsvd1[4]; + u32 triminfo_control; + u32 rsvd5[2]; + u32 tmu_control; + u32 rsvd7; + u32 tmu_status; + u32 sampling_internal; + u32 counter_value0; + u32 counter_value1; + u32 rsvd8[2]; + u32 current_temp; + u32 rsvd10[3]; + u32 threshold_temp_rise; + u32 threshold_temp_fall; + u32 rsvd13[2]; + u32 past_temp3_0; + u32 past_temp7_4; + u32 past_temp11_8; + u32 past_temp15_12; + u32 inten; + u32 intstat; + u32 intclear; + u32 rsvd15; + u32 emul_con; }; #endif /* __ASM_ARCH_TMU_H */ -- cgit v1.1 From 49f783650020c62fdba4a78d4d272dca22d33662 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Wed, 5 Jun 2013 07:47:56 +0200 Subject: arm, am33xx: move rtc32k_enable() to common place move rtc32k_enable() to common place so all am33xx boards can use it. Signed-off-by: Heiko Schocher Cc: Matt Porter Cc: Lars Poeschel Cc: Tom Rini Cc: Enric Balletbo i Serra --- arch/arm/cpu/armv7/am33xx/board.c | 18 ++++++++++++++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 2 ++ 2 files changed, 20 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 885fb2d..d3b3612 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -149,3 +149,21 @@ int arch_misc_init(void) #endif return 0; } + +#ifdef CONFIG_SPL_BUILD +void rtc32k_enable(void) +{ + struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; + + /* + * Unlock the RTC's registers. For more details please see the + * RTC_SS section of the TRM. In order to unlock we need to + * write these specific values (keys) in this order. + */ + writel(0x83e70b13, &rtc->kick0r); + writel(0x95a4f1e0, &rtc->kick1r); + + /* Enable the RTC 32K OSC by setting bits 3 and 6. */ + writel((1 << 3) | (1 << 6), &rtc->osc); +} +#endif diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index fedc674..6cce5a5 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -41,4 +41,6 @@ void gpmc_init(void); void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, u32 size); void omap_nand_switch_ecc(uint32_t, uint32_t); + +void rtc32k_enable(void); #endif -- cgit v1.1 From 7b9c5d0bfd906a57a46336b5505550024a8a761f Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Tue, 4 Jun 2013 11:01:06 +0200 Subject: arm, am335x: make mpu pll config configurable upcoming support for siemens boards switches mpu pll clk in board code. So make this configurable. Signed-off-by: Heiko Schocher Cc: Tom Rini --- arch/arm/cpu/armv7/am33xx/clock_am33xx.c | 9 +++++++-- arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 + 2 files changed, 8 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c index a1efc75..9c4d0b4 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c @@ -246,7 +246,7 @@ static void enable_per_clocks(void) ; } -static void mpu_pll_config(void) +void mpu_pll_config_val(int mpull_m) { u32 clkmode, clksel, div_m2; @@ -260,7 +260,7 @@ static void mpu_pll_config(void) ; clksel = clksel & (~CLK_SEL_MASK); - clksel = clksel | ((MPUPLL_M << CLK_SEL_SHIFT) | MPUPLL_N); + clksel = clksel | ((mpull_m << CLK_SEL_SHIFT) | MPUPLL_N); writel(clksel, &cmwkup->clkseldpllmpu); div_m2 = div_m2 & ~CLK_DIV_MASK; @@ -274,6 +274,11 @@ static void mpu_pll_config(void) ; } +static void mpu_pll_config(void) +{ + mpu_pll_config_val(CONFIG_SYS_MPUCLK); +} + static void core_pll_config(void) { u32 clkmode, clksel, div_m4, div_m5, div_m6; diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 6cce5a5..cbbb54e 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -32,6 +32,7 @@ extern struct ctrl_stat *cstat; u32 get_device_type(void); void save_omap_boot_params(void); void setup_clocks_for_console(void); +void mpu_pll_config_val(int mpull_m); void ddr_pll_config(unsigned int ddrpll_M); void sdelay(unsigned long); -- cgit v1.1 From 7ea7f689cab5bf715255e22c31aeefb23259afe5 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Tue, 4 Jun 2013 11:00:57 +0200 Subject: arm, am33xx: move uart soft reset code to common place move uart soft reset code to common place and call this function from board code, instead of copy and paste this code for every board. Signed-off-by: Heiko Schocher Cc: Matt Porter Cc: Lars Poeschel Cc: Tom Rini Cc: Enric Balletbo i Serra Acked-by: Tom Rini [trini: Fix igep0033 build, remove 'regval' on pcm051] Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/am33xx/board.c | 22 ++++++++++++++++++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 + 2 files changed, 23 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index d3b3612..b935a29 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -166,4 +166,26 @@ void rtc32k_enable(void) /* Enable the RTC 32K OSC by setting bits 3 and 6. */ writel((1 << 3) | (1 << 6), &rtc->osc); } + +#define UART_RESET (0x1 << 1) +#define UART_CLK_RUNNING_MASK 0x1 +#define UART_SMART_IDLE_EN (0x1 << 0x3) + +void uart_soft_reset(void) +{ + struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; + u32 regval; + + regval = readl(&uart_base->uartsyscfg); + regval |= UART_RESET; + writel(regval, &uart_base->uartsyscfg); + while ((readl(&uart_base->uartsyssts) & + UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK) + ; + + /* Disable smart idle */ + regval = readl(&uart_base->uartsyscfg); + regval |= UART_SMART_IDLE_EN; + writel(regval, &uart_base->uartsyscfg); +} #endif diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index cbbb54e..307ac28 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -44,4 +44,5 @@ void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, void omap_nand_switch_ecc(uint32_t, uint32_t); void rtc32k_enable(void); +void uart_soft_reset(void); #endif -- cgit v1.1 From c37980c31a30f0623a0ca8f112298e44039ed6bb Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Tue, 11 Jun 2013 14:17:30 +0200 Subject: arm: ensure u-boot only uses relative relocations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a Makefile target ('checkarmreloc') which fails if the ELF binary contains relocation records of types other than R_ARM_RELATIVE. Signed-off-by: Albert ARIBAUD Tested-by: Lubomir Popov Tested-by: Jeroen Hofstee Reviewed-by: Benoît Thébaudeau --- arch/arm/config.mk | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/config.mk b/arch/arm/config.mk index dc64160..e80e1ed 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -109,3 +109,8 @@ ifeq ($(GAS_BUG_12532),y) PLATFORM_RELFLAGS += -fno-optimize-sibling-calls endif endif + +# check that only R_ARM_RELATIVE relocations are generated +ifneq ($(CONFIG_SPL_BUILD),y) +ALL-y += checkarmreloc +endif -- cgit v1.1 From 09d81184e103a07825d9f16e86e37c28d3605568 Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Tue, 11 Jun 2013 14:17:31 +0200 Subject: remove all references to .dynsym MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Discard all .dynsym sections from linker scripts Remove all __dynsym_start definitions from linker scripts Remove all __dynsym_start references from the codebase Note: this touches include/asm-generic/sections.h, which is not ARM-specific, but actual uses of __dynsym_start are only in ARM, so this patch can safely go through the ARM repository. Signed-off-by: Albert ARIBAUD Tested-by: Lubomir Popov Tested-by: Jeroen Hofstee Reviewed-by: Benoît Thébaudeau --- arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds | 5 ----- arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds | 5 ----- arch/arm/cpu/ixp/u-boot.lds | 6 +----- arch/arm/cpu/u-boot-spl.lds | 6 +----- arch/arm/cpu/u-boot.lds | 6 +----- arch/arm/lib/relocate.S | 13 ------------- 6 files changed, 3 insertions(+), 38 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds index 673c725..f4e7525 100644 --- a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds +++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds @@ -57,11 +57,6 @@ SECTIONS __rel_dyn_end = .; } - .dynsym : { - __dynsym_start = .; - *(.dynsym) - } - .bss : { . = ALIGN(4); __bss_start = .; diff --git a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds index 967a135..446d095 100644 --- a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds +++ b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds @@ -57,11 +57,6 @@ SECTIONS __rel_dyn_end = .; } - .dynsym : { - __dynsym_start = .; - *(.dynsym) - } - .bss : { . = ALIGN(4); __bss_start = .; diff --git a/arch/arm/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds index 553589c..5cfff68 100644 --- a/arch/arm/cpu/ixp/u-boot.lds +++ b/arch/arm/cpu/ixp/u-boot.lds @@ -62,11 +62,6 @@ SECTIONS __rel_dyn_end = .; } - .dynsym : { - __dynsym_start = .; - *(.dynsym) - } - _end = .; /* @@ -88,6 +83,7 @@ SECTIONS KEEP(*(.__bss_end)); } + /DISCARD/ : { *(.dynsym) } /DISCARD/ : { *(.dynstr*) } /DISCARD/ : { *(.dynamic*) } /DISCARD/ : { *(.plt*) } diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds index 1408f03..b6ed25f 100644 --- a/arch/arm/cpu/u-boot-spl.lds +++ b/arch/arm/cpu/u-boot-spl.lds @@ -58,11 +58,6 @@ SECTIONS __rel_dyn_end = .; } - .dynsym : { - __dynsym_start = .; - *(.dynsym) - } - _end = .; .bss __rel_dyn_start (OVERLAY) : { @@ -72,6 +67,7 @@ SECTIONS __bss_end = .; } + /DISCARD/ : { *(.dynsym) } /DISCARD/ : { *(.dynstr*) } /DISCARD/ : { *(.dynamic*) } /DISCARD/ : { *(.plt*) } diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index d9bbee3..fe2ca98 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -65,11 +65,6 @@ SECTIONS __rel_dyn_end = .; } - .dynsym : { - __dynsym_start = .; - *(.dynsym) - } - _end = .; /* @@ -101,6 +96,7 @@ SECTIONS KEEP(*(.__bss_end)); } + /DISCARD/ : { *(.dynsym) } /DISCARD/ : { *(.dynstr*) } /DISCARD/ : { *(.dynamic*) } /DISCARD/ : { *(.plt*) } diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S index 4446da9..7a7c4c0 100644 --- a/arch/arm/lib/relocate.S +++ b/arch/arm/lib/relocate.S @@ -56,8 +56,6 @@ copy_loop: /* * fix .rel.dyn relocations */ - ldr r10, _dynsym_start_ofs /* r10 <- __dynsym_start local ofs */ - add r10, r10, r7 /* r10 <- SRC &__dynsym_start */ ldr r2, _rel_dyn_start_ofs /* r2 <- __rel_dyn_start local ofs */ add r2, r2, r7 /* r2 <- SRC &__rel_dyn_start */ ldr r3, _rel_dyn_end_ofs /* r3 <- __rel_dyn_end local ofs */ @@ -69,17 +67,8 @@ fixloop: and r7, r1, #0xff cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r7, #2 /* absolute fixup? */ - beq fixabs /* ignore unknown type of fixup */ b fixnext -fixabs: - /* absolute fix: set location to (offset) symbol value */ - mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ - add r1, r10, r1 /* r1 <- address of symbol in table */ - ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r1, r9 /* r1 <- relocated sym addr */ - b fixnext fixrel: /* relative fix: increase location by offset */ ldr r1, [r0] @@ -106,7 +95,5 @@ _rel_dyn_start_ofs: .word __rel_dyn_start - relocate_code _rel_dyn_end_ofs: .word __rel_dyn_end - relocate_code -_dynsym_start_ofs: - .word __dynsym_start - relocate_code ENDPROC(relocate_code) -- cgit v1.1 From df84502edffd1da48588a212b402602f032ed53d Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Tue, 11 Jun 2013 14:17:32 +0200 Subject: arm: generalize lib/bss.c into lib/sections.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit File arch/arm/lib/bss.c was initially defined for BSS only, but is now going to also contain definitions for other section-boundary-related symbols, so rename it for better accuracy. Also, remove useless 'used' attributes. Signed-off-by: Albert ARIBAUD Tested-by: Lubomir Popov Tested-by: Jeroen Hofstee Reviewed-by: Benoît Thébaudeau --- arch/arm/lib/Makefile | 2 +- arch/arm/lib/bss.c | 39 --------------------------------------- arch/arm/lib/sections.c | 39 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 40 deletions(-) delete mode 100644 arch/arm/lib/bss.c create mode 100644 arch/arm/lib/sections.c (limited to 'arch/arm') diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 8ad9f66..9ecafb2 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -43,7 +43,7 @@ SOBJS-y += relocate.o ifndef CONFIG_SYS_GENERIC_BOARD COBJS-y += board.o endif -COBJS-y += bss.o +COBJS-y += sections.o COBJS-y += bootm.o COBJS-$(CONFIG_OF_LIBFDT) += bootm-fdt.o diff --git a/arch/arm/lib/bss.c b/arch/arm/lib/bss.c deleted file mode 100644 index 99eda59..0000000 --- a/arch/arm/lib/bss.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright 2013 Albert ARIBAUD - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/** - * These two symbols are declared in a C file so that the linker - * uses R_ARM_RELATIVE relocation, rather than the R_ARM_ABS32 one - * it would use if the symbols were defined in the linker file. - * Using only R_ARM_RELATIVE relocation ensures that references to - * the symbols are correct after as well as before relocation. - * - * We need a 0-byte-size type for these symbols, and the compiler - * does not allow defining objects of C type 'void'. Using an empty - * struct is allowed by the compiler, but causes gcc versions 4.4 and - * below to complain about aliasing. Therefore we use the next best - * thing: zero-sized arrays, which are both 0-byte-size and exempt from - * aliasing warnings. - */ - -char __bss_start[0] __attribute__((used, section(".__bss_start"))); -char __bss_end[0] __attribute__((used, section(".__bss_end"))); diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c new file mode 100644 index 0000000..e52fec9 --- /dev/null +++ b/arch/arm/lib/sections.c @@ -0,0 +1,39 @@ +/* + * Copyright 2013 Albert ARIBAUD + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/** + * These two symbols are declared in a C file so that the linker + * uses R_ARM_RELATIVE relocation, rather than the R_ARM_ABS32 one + * it would use if the symbols were defined in the linker file. + * Using only R_ARM_RELATIVE relocation ensures that references to + * the symbols are correct after as well as before relocation. + * + * We need a 0-byte-size type for these symbols, and the compiler + * does not allow defining objects of C type 'void'. Using an empty + * struct is allowed by the compiler, but causes gcc versions 4.4 and + * below to complain about aliasing. Therefore we use the next best + * thing: zero-sized arrays, which are both 0-byte-size and exempt from + * aliasing warnings. + */ + +char __bss_start[0] __attribute__((section(".__bss_start"))); +char __bss_end[0] __attribute__((section(".__bss_end"))); -- cgit v1.1 From d026dec8751378473b4f12eb87717c8059472b3e Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Tue, 11 Jun 2013 14:17:33 +0200 Subject: arm: make __image_copy_{start, end} compiler-generated MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This change is only done where needed: some linker scripts may contain __image_copy_{start,end} yet remain unchanged. Also, __image_copy_end needs its own section; putting it in relocation sections changes their flags and makes relocation break. Signed-off-by: Albert ARIBAUD Tested-by: Lubomir Popov Tested-by: Jeroen Hofstee Reviewed-by: Benoît Thébaudeau --- arch/arm/cpu/arm920t/ep93xx/u-boot.lds | 6 +++++- arch/arm/cpu/ixp/u-boot.lds | 6 +++++- arch/arm/cpu/u-boot.lds | 7 +++++-- arch/arm/lib/relocate.S | 7 ++----- arch/arm/lib/sections.c | 2 ++ 5 files changed, 19 insertions(+), 9 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds index cf55bf7..367c805 100644 --- a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds +++ b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds @@ -31,6 +31,7 @@ SECTIONS . = ALIGN(4); .text : { + *(.__image_copy_start) arch/arm/cpu/arm920t/start.o (.text*) /* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */ . = 0x1000; @@ -56,7 +57,10 @@ SECTIONS . = ALIGN(4); - __image_copy_end = .; + .image_copy_end : + { + *(.__image_copy_end) + } __bss_start = .; .bss : { *(.bss*) } diff --git a/arch/arm/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds index 5cfff68..9141199 100644 --- a/arch/arm/cpu/ixp/u-boot.lds +++ b/arch/arm/cpu/ixp/u-boot.lds @@ -31,6 +31,7 @@ SECTIONS . = ALIGN(4); .text : { + *(.__image_copy_start) arch/arm/cpu/ixp/start.o(.text*) *(.text*) } @@ -54,7 +55,10 @@ SECTIONS . = ALIGN(4); - __image_copy_end = .; + .image_copy_end : + { + *(.__image_copy_end) + } .rel.dyn : { __rel_dyn_start = .; diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index fe2ca98..d7adf90 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -33,7 +33,7 @@ SECTIONS . = ALIGN(4); .text : { - __image_copy_start = .; + *(.__image_copy_start) CPUDIR/start.o (.text*) *(.text*) } @@ -57,7 +57,10 @@ SECTIONS . = ALIGN(4); - __image_copy_end = .; + .image_copy_end : + { + *(.__image_copy_end) + } .rel.dyn : { __rel_dyn_start = .; diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S index 7a7c4c0..3767a95 100644 --- a/arch/arm/lib/relocate.S +++ b/arch/arm/lib/relocate.S @@ -39,13 +39,12 @@ ENTRY(relocate_code) mov r6, r0 /* save addr of destination */ - ldr r0, =_start /* r0 <- SRC &_start */ + ldr r0, =__image_copy_start /* r0 <- SRC &__image_copy_start */ subs r9, r6, r0 /* r9 <- relocation offset */ beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy loop */ adr r7, relocate_code /* r7 <- SRC &relocate_code */ - ldr r3, _image_copy_end_ofs /* r3 <- __image_copy_end local ofs */ - add r2, r7, r3 /* r2 <- SRC &__image_copy_end */ + ldr r2, =__image_copy_end /* r2 <- SRC &__image_copy_end */ copy_loop: ldmia r0!, {r10-r11} /* copy from source address [r0] */ @@ -89,8 +88,6 @@ relocate_done: bx lr #endif -_image_copy_end_ofs: - .word __image_copy_end - relocate_code _rel_dyn_start_ofs: .word __rel_dyn_start - relocate_code _rel_dyn_end_ofs: diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c index e52fec9..03e846f 100644 --- a/arch/arm/lib/sections.c +++ b/arch/arm/lib/sections.c @@ -37,3 +37,5 @@ char __bss_start[0] __attribute__((section(".__bss_start"))); char __bss_end[0] __attribute__((section(".__bss_end"))); +char __image_copy_start[0] __attribute__((section(".__image_copy_start"))); +char __image_copy_end[0] __attribute__((section(".__image_copy_end"))); -- cgit v1.1 From 47bd65ef057fb71b02b32741d5cfcaf03e2f0918 Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Tue, 11 Jun 2013 14:17:34 +0200 Subject: arm: make __rel_dyn_{start, end} compiler-generated MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This change is only done where needed: some linker scripts may contain relocation symbols yet remain unchanged. __rel_dyn_start and __rel_dyn_end each requires its own output section; putting them in relocation sections changes their flags and breaks relocation. Signed-off-by: Albert ARIBAUD Tested-by: Lubomir Popov Tested-by: Jeroen Hofstee Reviewed-by: Benoît Thébaudeau --- arch/arm/cpu/ixp/u-boot.lds | 12 ++++++++++-- arch/arm/cpu/u-boot.lds | 12 ++++++++++-- arch/arm/lib/relocate.S | 11 ++--------- arch/arm/lib/sections.c | 2 ++ 4 files changed, 24 insertions(+), 13 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds index 9141199..54bafda 100644 --- a/arch/arm/cpu/ixp/u-boot.lds +++ b/arch/arm/cpu/ixp/u-boot.lds @@ -60,10 +60,18 @@ SECTIONS *(.__image_copy_end) } + .rel_dyn_start : + { + *(.__rel_dyn_start) + } + .rel.dyn : { - __rel_dyn_start = .; *(.rel*) - __rel_dyn_end = .; + } + + .rel_dyn_end : + { + *(.__rel_dyn_end) } _end = .; diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index d7adf90..3037885 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -62,10 +62,18 @@ SECTIONS *(.__image_copy_end) } + .rel_dyn_start : + { + *(.__rel_dyn_start) + } + .rel.dyn : { - __rel_dyn_start = .; *(.rel*) - __rel_dyn_end = .; + } + + .rel_dyn_end : + { + *(.__rel_dyn_end) } _end = .; diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S index 3767a95..3f444c1 100644 --- a/arch/arm/lib/relocate.S +++ b/arch/arm/lib/relocate.S @@ -55,10 +55,8 @@ copy_loop: /* * fix .rel.dyn relocations */ - ldr r2, _rel_dyn_start_ofs /* r2 <- __rel_dyn_start local ofs */ - add r2, r2, r7 /* r2 <- SRC &__rel_dyn_start */ - ldr r3, _rel_dyn_end_ofs /* r3 <- __rel_dyn_end local ofs */ - add r3, r3, r7 /* r3 <- SRC &__rel_dyn_end */ + ldr r2, =__rel_dyn_start /* r2 <- SRC &__rel_dyn_start */ + ldr r3, =__rel_dyn_end /* r3 <- SRC &__rel_dyn_end */ fixloop: ldr r0, [r2] /* r0 <- SRC location to fix up */ add r0, r0, r9 /* r0 <- DST location to fix up */ @@ -88,9 +86,4 @@ relocate_done: bx lr #endif -_rel_dyn_start_ofs: - .word __rel_dyn_start - relocate_code -_rel_dyn_end_ofs: - .word __rel_dyn_end - relocate_code - ENDPROC(relocate_code) diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c index 03e846f..5921dd8 100644 --- a/arch/arm/lib/sections.c +++ b/arch/arm/lib/sections.c @@ -39,3 +39,5 @@ char __bss_start[0] __attribute__((section(".__bss_start"))); char __bss_end[0] __attribute__((section(".__bss_end"))); char __image_copy_start[0] __attribute__((section(".__image_copy_start"))); char __image_copy_end[0] __attribute__((section(".__image_copy_end"))); +char __rel_dyn_start[0] __attribute__((section(".__rel_dyn_start"))); +char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end"))); -- cgit v1.1 From fbf87b1823dd5ebc2a384711ea2c677543019ece Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Tue, 11 Jun 2013 14:17:35 +0200 Subject: arm: optimize relocate_code routine MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use section symbols directly Drop support for R_ARM_ABS32 record types Eliminate unneeded intermediate registers Optimize relocation table iteration Signed-off-by: Albert ARIBAUD Tested-by: Lubomir Popov Tested-by: Jeroen Hofstee Reviewed-by: Benoît Thébaudeau --- arch/arm/lib/relocate.S | 32 ++++++++++++-------------------- 1 file changed, 12 insertions(+), 20 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S index 3f444c1..949b9e8 100644 --- a/arch/arm/lib/relocate.S +++ b/arch/arm/lib/relocate.S @@ -37,19 +37,15 @@ */ ENTRY(relocate_code) - mov r6, r0 /* save addr of destination */ - - ldr r0, =__image_copy_start /* r0 <- SRC &__image_copy_start */ - subs r9, r6, r0 /* r9 <- relocation offset */ + ldr r1, =__image_copy_start /* r1 <- SRC &__image_copy_start */ + subs r9, r0, r1 /* r9 <- relocation offset */ beq relocate_done /* skip relocation */ - mov r1, r6 /* r1 <- scratch for copy loop */ - adr r7, relocate_code /* r7 <- SRC &relocate_code */ ldr r2, =__image_copy_end /* r2 <- SRC &__image_copy_end */ copy_loop: - ldmia r0!, {r10-r11} /* copy from source address [r0] */ - stmia r1!, {r10-r11} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ + ldmia r1!, {r10-r11} /* copy from source address [r1] */ + stmia r0!, {r10-r11} /* copy to target address [r0] */ + cmp r1, r2 /* until source end address [r2] */ blo copy_loop /* @@ -58,21 +54,17 @@ copy_loop: ldr r2, =__rel_dyn_start /* r2 <- SRC &__rel_dyn_start */ ldr r3, =__rel_dyn_end /* r3 <- SRC &__rel_dyn_end */ fixloop: - ldr r0, [r2] /* r0 <- SRC location to fix up */ - add r0, r0, r9 /* r0 <- DST location to fix up */ - ldr r1, [r2, #4] - and r7, r1, #0xff - cmp r7, #23 /* relative fixup? */ - beq fixrel - /* ignore unknown type of fixup */ - b fixnext -fixrel: + ldmia r2!, {r0-r1} /* (r0,r1) <- (SRC location,fixup) */ + and r1, r1, #0xff + cmp r1, #23 /* relative fixup? */ + bne fixnext + /* relative fix: increase location by offset */ + add r0, r0, r9 ldr r1, [r0] add r1, r1, r9 -fixnext: str r1, [r0] - add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ +fixnext: cmp r2, r3 blo fixloop -- cgit v1.1