From 019df879a93e266ac19f5eb00e4ee605db279b14 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:41 +0900 Subject: ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada --- .../mach-uniphier/pinctrl/pinctrl-proxstream2.c | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c (limited to 'arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c') diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c new file mode 100644 index 0000000..96abd02 --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +void proxstream2_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(30, 8, 8, 4); /* XNFRE -> XNFRE */ + sg_set_pinsel(31, 8, 8, 4); /* XNFWE -> XNFWE */ + sg_set_pinsel(32, 8, 8, 4); /* NFALE -> NFALE */ + sg_set_pinsel(33, 8, 8, 4); /* NFCLE -> NFCLE */ + sg_set_pinsel(34, 8, 8, 4); /* XNFWP -> XNFWP */ + sg_set_pinsel(35, 8, 8, 4); /* XNFCE0 -> XNFCE0 */ + sg_set_pinsel(36, 8, 8, 4); /* NRYBY0 -> NRYBY0 */ + sg_set_pinsel(37, 8, 8, 4); /* XNFCE1 -> NRYBY1 */ + sg_set_pinsel(38, 8, 8, 4); /* NRYBY1 -> XNFCE1 */ + sg_set_pinsel(39, 8, 8, 4); /* NFD0 -> NFD0 */ + sg_set_pinsel(40, 8, 8, 4); /* NFD1 -> NFD1 */ + sg_set_pinsel(41, 8, 8, 4); /* NFD2 -> NFD2 */ + sg_set_pinsel(42, 8, 8, 4); /* NFD3 -> NFD3 */ + sg_set_pinsel(43, 8, 8, 4); /* NFD4 -> NFD4 */ + sg_set_pinsel(44, 8, 8, 4); /* NFD5 -> NFD5 */ + sg_set_pinsel(45, 8, 8, 4); /* NFD6 -> NFD6 */ + sg_set_pinsel(46, 8, 8, 4); /* NFD7 -> NFD7 */ +#endif + +#ifdef CONFIG_USB_XHCI_UNIPHIER + sg_set_pinsel(56, 8, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(57, 8, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(58, 8, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(59, 8, 8, 4); /* USB1OD -> USB1OD */ + sg_set_pinsel(60, 8, 8, 4); /* USB2VBUS -> USB2VBUS */ + sg_set_pinsel(61, 8, 8, 4); /* USB2OD -> USB2OD */ + sg_set_pinsel(62, 8, 8, 4); /* USB3VBUS -> USB3VBUS */ + sg_set_pinsel(63, 8, 8, 4); /* USB3OD -> USB3OD */ +#endif +} -- cgit v1.1