From 9c6d3b7b666b949a5015146a6539b468fbbf451f Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 25 Apr 2015 06:29:51 +0200 Subject: arm: mvebu: Add basic Armada 38x support This patch adds support for the Marvell Armada 38x SoC family. Supported peripherals are: - UART - Ethernet (mvneta) - I2C - SPI (including SPI NOR flash) Tested on Marvell DB-88F6820-GP evaluation board. Signed-off-by: Stefan Roese Tested-by: Kevin Smith Tested-by: Dirk Eibach --- arch/arm/mach-mvebu/include/mach/soc.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm/mach-mvebu/include/mach/soc.h') diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index f3e0398..0a9307c 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -12,6 +12,13 @@ #define _MVEBU_SOC_H #define SOC_MV78460_ID 0x7846 +#define SOC_88F6810_ID 0x6810 +#define SOC_88F6820_ID 0x6820 +#define SOC_88F6828_ID 0x6828 + +/* A38x revisions */ +#define MV_88F68XX_Z1_ID 0x0 +#define MV_88F68XX_A0_ID 0x4 /* TCLK Core Clock definition */ #ifndef CONFIG_SYS_TCLK @@ -25,6 +32,8 @@ #define MVEBU_REGISTER(x) (SOC_REGS_PHY_BASE + x) #define MVEBU_SDRAM_SCRATCH (MVEBU_REGISTER(0x01504)) +#define MVEBU_L2_CACHE_BASE (MVEBU_REGISTER(0x08000)) +#define CONFIG_SYS_PL310_BASE MVEBU_L2_CACHE_BASE #define MVEBU_SPI_BASE (MVEBU_REGISTER(0x10600)) #define MVEBU_TWSI_BASE (MVEBU_REGISTER(0x11000)) #define MVEBU_UART0_BASE (MVEBU_REGISTER(0x12000)) -- cgit v1.1